[S] Change in coreboot[main]: soc/intel/common/block/acpi: Add GPE1 blocks to ACPI FADT table

[Subrata Banik (Code Review)]

Attention is currently required from: Anil Kumar K, Bora Guvendik, Cliff Huang, Hannah Williams, Paul Menzel.

Subrata Banik has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84103?usp=email )

Change subject: soc/intel/common/block/acpi: Add GPE1 blocks to ACPI FADT table
......................................................................

Patch Set 11:

(6 comments)

File src/soc/intel/common/block/acpi/Kconfig:

https://review.coreboot.org/c/coreboot/+/84103/comment/49fb1b1c_fa2783df?usp... :
PS11, Line 80: e
nit
`Event`

File src/soc/intel/common/block/acpi/acpi.c:

https://review.coreboot.org/c/coreboot/+/84103/comment/1a716638_99be03bf?usp... :
PS11, Line 108: 	fadt->gpe0_blk_len = 2 * GPE0_REG_MAX * sizeof(uint32_t);
move this at line #106?

https://review.coreboot.org/c/coreboot/+/84103/comment/67d0f76f_c98eebef?usp... :
PS11, Line 109: !fadt->gpe1_blk
again same mistake.
```
if (fadt->gpe1_blk) {
    	...
}
```

https://review.coreboot.org/c/coreboot/+/84103/comment/f3ae8a3c_a0c753e6?usp... :
PS11, Line 110: gpe0_blk_len
shouldn't this be `fadt->gpe1_blk_len`

https://review.coreboot.org/c/coreboot/+/84103/comment/ad644eaa_032d83fd?usp... :
PS11, Line 115: 0
should be `gpe1_blk_len` as per ACPI spec?

```
GPE0_BLK_LEN 1 92 The length of the register whose address is given by
X_GPE0_BLK (if nonzero) or by GPE0_BLK (otherwise) in bytes. The value is a non-negative multiple of 2.

GPE1_BLK_LEN 1 93 The length of the register whose address is given by
X_GPE1_BLK (if nonzero) or by GPE1_BLK (otherwise) in bytes. The value is a non-negative multiple of 2.

GPE1_BASE 1 94 Offset within the ACPI general-purpose event model
where GPE1 based events start
```

File src/soc/intel/common/block/include/intelblocks/pmclib.h:

https://review.coreboot.org/c/coreboot/+/84103/comment/cb0f521f_a6617c2b?usp... :
PS11, Line 140: In addition, the following SOC GPE1 defines are required in common
              :  * code but not present in older platform headers. Therefore, the dummy entries
              :  * are added here for platforms without GPE1 support.
move this highlighted comment above line #11 as its applicable there