Change in coreboot[master]: soc/intel/alderlake: Allow mainboard to configure USB2 Phy power gating

[Paul Menzel (Code Review)]

Attention is currently required from: Subrata Banik, Tim Wawrzynczak, Sridhar Siricilla, Kane Chen.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63293 )

Change subject: soc/intel/alderlake: Allow mainboard to configure USB2 Phy power gating
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Patch Set 2:

(2 comments)

File src/soc/intel/alderlake/chip.h:

https://review.coreboot.org/c/coreboot/+/63293/comment/33dbd3f8_60d48766 
PS2, Line 572:   
One space.

https://review.coreboot.org/c/coreboot/+/63293/comment/ebc23202_aba3dd35 
PS2, Line 572: orderto
order to