[XL] Change in coreboot[main]: mb/emulation: Add SIMICS QSP support

[Arthur Heymans (Code Review)]

Attention is currently required from: Angel Pons, Benjamin Doron, Christian Walter, Lean Sheng Tan, Leon Groß, Patrick Rudolph, Paul Menzel.

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77905?usp=email )

Change subject: mb/emulation: Add SIMICS QSP support
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Patch Set 13:

(1 comment)

File src/mainboard/emulation/simics-qsp/memmap.c:

https://review.coreboot.org/c/coreboot/+/77905/comment/7045e87c_b9e90565 :
PS4, Line 97: postcar_frame_add_mtrr(pcf, top_of_ram - 8*MiB, 8*MiB, MTRR_TYPE_WRBACK);
            : 	postcar_frame_add_mtrr(pcf, top_of_ram, 8*MiB, MTRR_TYPE_WRBACK);
> Simulator is different with emulator. Simics actually simulates the RTL design.

I'm confused. Most of the real hardware is not there, however MTRR are?

Also you're not setting up MTRR properly, which you need to do in ramstage during CPU init. You just set up a WB cached frame to use after romstage. Either do it completely right or drop this.