Change in coreboot[master]: soc/intel: Remove legacy static TPM asl code

[Philipp Deppenwiese (Code Review)]

Philipp Deppenwiese has uploaded this change for review. ( https://review.coreboot.org/27715

Change subject: soc/intel: Remove legacy static TPM asl code
......................................................................

soc/intel: Remove legacy static TPM asl code

Since the TPM software stack refactoring static
TPM ACPI code isn't needed anymore.

Change-Id: I36a99cbc420ecfa55aa5c89787151d482225adf2
Signed-off-by: Philipp Deppenwiese 
---
M src/soc/intel/baytrail/acpi/lpc.asl
M src/soc/intel/braswell/acpi/lpc.asl
M src/soc/intel/denverton_ns/acpi/lpc.asl
M src/soc/intel/fsp_baytrail/acpi/lpc.asl
4 files changed, 0 insertions(+), 93 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/27715/1

diff --git a/src/soc/intel/baytrail/acpi/lpc.asl b/src/soc/intel/baytrail/acpi/lpc.asl
index 17d6f43..00aac51 100644
--- a/src/soc/intel/baytrail/acpi/lpc.asl
+++ b/src/soc/intel/baytrail/acpi/lpc.asl
@@ -135,27 +135,4 @@

// Include mainboard's superio.asl file.
    #include "acpi/superio.asl"
-
-#if IS_ENABLED(CONFIG_LPC_TPM)
-	Device (TPM)		// Trusted Platform Module
-	{
-		Name(_HID, EISAID("IFX0102"))
-		Name(_CID, 0x310cd041)
-		Name(_UID, 1)
-
-		Method(_STA, 0)
-		{
-			If (TPMP) {
-				Return (0xf)
-			}
-			Return (0x0)
-		}
-
-		Name(_CRS, ResourceTemplate() {
-			IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)
-			IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)
-			Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
-		})
-	}
-#endif
 }
diff --git a/src/soc/intel/braswell/acpi/lpc.asl b/src/soc/intel/braswell/acpi/lpc.asl
index eb4a16a..0a8b8bc 100644
--- a/src/soc/intel/braswell/acpi/lpc.asl
+++ b/src/soc/intel/braswell/acpi/lpc.asl
@@ -137,27 +137,4 @@

/* Include mainboard's superio.asl file. */
    #include "acpi/superio.asl"
-
-#if IS_ENABLED(CONFIG_LPC_TPM)
-	Device (TPM)		/* Trusted Platform Module */
-	{
-		Name(_HID, EISAID("IFX0102"))
-		Name(_CID, 0x310cd041)
-		Name(_UID, 1)
-
-		Method(_STA, 0)
-		{
-			If (TPMP) {
-				Return (0xf)
-			}
-			Return (0x0)
-		}
-
-		Name(_CRS, ResourceTemplate() {
-			IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)
-			IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)
-			Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
-		})
-	}
-#endif
 }
diff --git a/src/soc/intel/denverton_ns/acpi/lpc.asl b/src/soc/intel/denverton_ns/acpi/lpc.asl
index 3167c18..cc36451 100644
--- a/src/soc/intel/denverton_ns/acpi/lpc.asl
+++ b/src/soc/intel/denverton_ns/acpi/lpc.asl
@@ -205,28 +205,4 @@
    	Return(BUF0)
      }
    }
-
-#ifdef ENABLE_TPM
-	Device (TPM)		// Trusted Platform Module
-	{
-		Name(_HID, EISAID("IFX0102"))
-		Name(_CID, 0x310cd041)
-		Name(_UID, 1)
-
-		Method(_STA, 0)
-		{
-			If (TPMP) {
-				Return (0xf)
-			}
-			Return (0x0)
-		}
-
-		Name(_CRS, ResourceTemplate() {
-			IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)
-			IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)
-			Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
-			IRQ (Edge, Activehigh, Exclusive) { 6 }
-		})
-	}
-#endif
 }
diff --git a/src/soc/intel/fsp_baytrail/acpi/lpc.asl b/src/soc/intel/fsp_baytrail/acpi/lpc.asl
index 17d6f43..00aac51 100644
--- a/src/soc/intel/fsp_baytrail/acpi/lpc.asl
+++ b/src/soc/intel/fsp_baytrail/acpi/lpc.asl
@@ -135,27 +135,4 @@

// Include mainboard's superio.asl file.
    #include "acpi/superio.asl"
-
-#if IS_ENABLED(CONFIG_LPC_TPM)
-	Device (TPM)		// Trusted Platform Module
-	{
-		Name(_HID, EISAID("IFX0102"))
-		Name(_CID, 0x310cd041)
-		Name(_UID, 1)
-
-		Method(_STA, 0)
-		{
-			If (TPMP) {
-				Return (0xf)
-			}
-			Return (0x0)
-		}
-
-		Name(_CRS, ResourceTemplate() {
-			IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)
-			IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)
-			Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
-		})
-	}
-#endif
 }