Change in coreboot[master]: {northbridge,soc,southbridge}: Get rid of wrong _ADR objects
HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36318 )
Change subject: {northbridge,soc,southbridge}: Get rid of wrong _ADR objects ......................................................................
{northbridge,soc,southbridge}: Get rid of wrong _ADR objects
ACPI Version 6.3 Section 6.1: "A device object must contain either an _HID object or an _ADR object, but should not contain both."
Change-Id: Ifb777c09aeef09a6a4cbee254b081519f5b6c457 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/amd/agesa/family14/acpi/northbridge.asl M src/soc/amd/stoneyridge/acpi/northbridge.asl M src/soc/intel/broadwell/acpi/serialio.asl M src/soc/intel/fsp_broadwell_de/acpi/uncore.asl M src/southbridge/intel/lynxpoint/acpi/serialio.asl 5 files changed, 0 insertions(+), 19 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/36318/1
diff --git a/src/northbridge/amd/agesa/family14/acpi/northbridge.asl b/src/northbridge/amd/agesa/family14/acpi/northbridge.asl index e95c95a..5a54874 100644 --- a/src/northbridge/amd/agesa/family14/acpi/northbridge.asl +++ b/src/northbridge/amd/agesa/family14/acpi/northbridge.asl @@ -18,7 +18,6 @@ External (TOM2) Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */ Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */ -Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
/* Describe the Northbridge devices */ Device(AMRT) { diff --git a/src/soc/amd/stoneyridge/acpi/northbridge.asl b/src/soc/amd/stoneyridge/acpi/northbridge.asl index fe78534..208ea26 100644 --- a/src/soc/amd/stoneyridge/acpi/northbridge.asl +++ b/src/soc/amd/stoneyridge/acpi/northbridge.asl @@ -19,7 +19,6 @@ External (TOM2) Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */ Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */ -Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
/* Describe the Northbridge devices */
diff --git a/src/soc/intel/broadwell/acpi/serialio.asl b/src/soc/intel/broadwell/acpi/serialio.asl index 1b44e95..1968502 100644 --- a/src/soc/intel/broadwell/acpi/serialio.asl +++ b/src/soc/intel/broadwell/acpi/serialio.asl @@ -159,7 +159,6 @@ // Serial IO DMA Controller Name (_HID, "INTL9C60") Name (_UID, 1) - Name (_ADR, 0x00150000)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -205,7 +204,6 @@ Return ("INT33C2") } Name (_UID, 1) - Name (_ADR, 0x00150001)
Name (SSCN, Package () { 432, 507, 30 }) Name (FMCN, Package () { 72, 160, 30 }) @@ -276,7 +274,6 @@ Return ("INT33C3") } Name (_UID, 1) - Name (_ADR, 0x00150002)
Name (SSCN, Package () { 432, 507, 30 }) Name (FMCN, Package () { 72, 160, 30 }) @@ -347,7 +344,6 @@ Return ("INT33C0") } Name (_UID, 1) - Name (_ADR, 0x00150003)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -403,7 +399,6 @@ Return ("INT33C1") } Name (_UID, 1) - Name (_ADR, 0x00150004)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -471,7 +466,6 @@ Return ("INT33C4") } Name (_UID, 1) - Name (_ADR, 0x00150005)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -539,7 +533,6 @@ Return ("INT33C5") } Name (_UID, 1) - Name (_ADR, 0x00150006)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -596,7 +589,6 @@ } Name (_CID, "PNP0D40") Name (_UID, 1) - Name (_ADR, 0x00170000)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () diff --git a/src/soc/intel/fsp_broadwell_de/acpi/uncore.asl b/src/soc/intel/fsp_broadwell_de/acpi/uncore.asl index 86b1410..aded1db 100644 --- a/src/soc/intel/fsp_broadwell_de/acpi/uncore.asl +++ b/src/soc/intel/fsp_broadwell_de/acpi/uncore.asl @@ -238,7 +238,6 @@ Return (0xff) }
- Name (_ADR, 0x00) Method (_STA, 0, NotSerialized) { Return (0xf) diff --git a/src/southbridge/intel/lynxpoint/acpi/serialio.asl b/src/southbridge/intel/lynxpoint/acpi/serialio.asl index 9323b91..88138a1 100644 --- a/src/southbridge/intel/lynxpoint/acpi/serialio.asl +++ b/src/southbridge/intel/lynxpoint/acpi/serialio.asl @@ -125,7 +125,6 @@ // Serial IO DMA Controller Name (_HID, "INTL9C60") Name (_UID, 1) - Name (_ADR, 0x00150000)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -163,7 +162,6 @@ Name (_HID, "INT33C2") Name (_CID, "INT33C2") Name (_UID, 1) - Name (_ADR, 0x00150001)
Name (SSCN, Package () { 432, 507, 30 }) Name (FMCN, Package () { 72, 160, 30 }) @@ -245,7 +243,6 @@ Name (_HID, "INT33C3") Name (_CID, "INT33C3") Name (_UID, 1) - Name (_ADR, 0x00150002)
Name (SSCN, Package () { 432, 507, 30 }) Name (FMCN, Package () { 72, 160, 30 }) @@ -327,7 +324,6 @@ Name (_HID, "INT33C0") Name (_CID, "INT33C0") Name (_UID, 1) - Name (_ADR, 0x00150003)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -365,7 +361,6 @@ Name (_HID, "INT33C1") Name (_CID, "INT33C1") Name (_UID, 1) - Name (_ADR, 0x00150004)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -416,7 +411,6 @@ Name (_HID, "INT33C4") Name (_CID, "INT33C4") Name (_UID, 1) - Name (_ADR, 0x00150005)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -467,7 +461,6 @@ Name (_HID, "INT33C5") Name (_CID, "INT33C5") Name (_UID, 1) - Name (_ADR, 0x00150006)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -505,7 +498,6 @@ Name (_HID, "INT33C6") Name (_CID, "PNP0D40") Name (_UID, 1) - Name (_ADR, 0x00170000)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate ()
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36318 )
Change subject: {northbridge,soc,southbridge}: Get rid of wrong _ADR objects ......................................................................
Patch Set 1: Code-Review+2
Hello Patrick Rudolph, Philipp Deppenwiese, build bot (Jenkins), Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36318
to look at the new patch set (#3).
Change subject: {northbridge,soc,southbridge}: Get rid of wrong _ADR objects ......................................................................
{northbridge,soc,southbridge}: Get rid of wrong _ADR objects
ACPI Version 6.3 Section 6.1: "A device object must contain either an _HID object or an _ADR object, but should not contain both."
Change-Id: Ifb777c09aeef09a6a4cbee254b081519f5b6c457 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/amd/agesa/family14/acpi/northbridge.asl M src/northbridge/amd/pi/00630F01/acpi/northbridge.asl M src/soc/amd/stoneyridge/acpi/northbridge.asl M src/soc/intel/broadwell/acpi/serialio.asl M src/soc/intel/fsp_broadwell_de/acpi/uncore.asl M src/southbridge/intel/lynxpoint/acpi/serialio.asl 6 files changed, 0 insertions(+), 20 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/36318/3
Hello Patrick Rudolph, Philipp Deppenwiese, build bot (Jenkins), Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36318
to look at the new patch set (#6).
Change subject: {northbridge,soc,southbridge}: Get rid of wrong _ADR objects ......................................................................
{northbridge,soc,southbridge}: Get rid of wrong _ADR objects
ACPI Version 6.3 Section 6.1: "A device object must contain either an _HID object or an _ADR object, but should not contain both."
Change-Id: Ifb777c09aeef09a6a4cbee254b081519f5b6c457 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/amd/agesa/family14/acpi/northbridge.asl M src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl M src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl M src/northbridge/amd/pi/00630F01/acpi/northbridge.asl M src/soc/amd/stoneyridge/acpi/northbridge.asl M src/soc/intel/broadwell/acpi/serialio.asl M src/soc/intel/fsp_broadwell_de/acpi/uncore.asl M src/southbridge/intel/lynxpoint/acpi/serialio.asl 8 files changed, 0 insertions(+), 23 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/36318/6
Hello Patrick Rudolph, Duncan Laurie, Philipp Deppenwiese, build bot (Jenkins), Martin Roth, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36318
to look at the new patch set (#8).
Change subject: {northbridge,soc,southbridge}: Get rid of wrong _ADR objects ......................................................................
{northbridge,soc,southbridge}: Get rid of wrong _ADR objects
ACPI Version 6.3 Section 6.1: "A device object must contain either an _HID object or an _ADR object, but should not contain both."
Change-Id: Ifb777c09aeef09a6a4cbee254b081519f5b6c457 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/amd/agesa/family14/acpi/northbridge.asl M src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl M src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl M src/northbridge/amd/pi/00630F01/acpi/northbridge.asl M src/northbridge/amd/pi/00660F01/acpi/northbridge.asl M src/northbridge/amd/pi/00730F01/acpi/northbridge.asl M src/soc/amd/stoneyridge/acpi/northbridge.asl M src/soc/intel/broadwell/acpi/serialio.asl M src/soc/intel/fsp_broadwell_de/acpi/uncore.asl M src/southbridge/intel/lynxpoint/acpi/serialio.asl 10 files changed, 0 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/36318/8
Hello Patrick Rudolph, Duncan Laurie, Philipp Deppenwiese, build bot (Jenkins), Martin Roth, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36318
to look at the new patch set (#9).
Change subject: {northbridge,soc,southbridge}: Get rid of wrong _ADR objects ......................................................................
{northbridge,soc,southbridge}: Get rid of wrong _ADR objects
ACPI Version 6.3 Section 6.1: "A device object must contain either an _HID object or an _ADR object, but should not contain both."
Change-Id: Ifb777c09aeef09a6a4cbee254b081519f5b6c457 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/amd/agesa/family14/acpi/northbridge.asl M src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl M src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl M src/northbridge/amd/pi/00630F01/acpi/northbridge.asl M src/northbridge/amd/pi/00660F01/acpi/northbridge.asl M src/northbridge/amd/pi/00730F01/acpi/northbridge.asl M src/soc/amd/stoneyridge/acpi/northbridge.asl M src/soc/intel/broadwell/acpi/serialio.asl M src/southbridge/intel/lynxpoint/acpi/serialio.asl 9 files changed, 0 insertions(+), 24 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/36318/9
Hello Patrick Rudolph, Duncan Laurie, Philipp Deppenwiese, build bot (Jenkins), Martin Roth, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36318
to look at the new patch set (#10).
Change subject: {northbridge,soc,southbridge}: Get rid of wrong _ADR objects ......................................................................
{northbridge,soc,southbridge}: Get rid of wrong _ADR objects
ACPI Version 6.3 Section 6.1: "A device object must contain either an _HID object or an _ADR object, but should not contain both."
Change-Id: Ifb777c09aeef09a6a4cbee254b081519f5b6c457 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/amd/agesa/family14/acpi/northbridge.asl M src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl M src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl M src/northbridge/amd/pi/00630F01/acpi/northbridge.asl M src/northbridge/amd/pi/00660F01/acpi/northbridge.asl M src/northbridge/amd/pi/00730F01/acpi/northbridge.asl M src/soc/amd/stoneyridge/acpi/northbridge.asl M src/soc/intel/broadwell/acpi/serialio.asl M src/southbridge/intel/lynxpoint/acpi/serialio.asl 9 files changed, 9 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/36318/10
Hello Patrick Rudolph, Duncan Laurie, Philipp Deppenwiese, build bot (Jenkins), Martin Roth, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36318
to look at the new patch set (#11).
Change subject: {northbridge,soc,southbridge}: Don't use both of _ADR and _HID ......................................................................
{northbridge,soc,southbridge}: Don't use both of _ADR and _HID
ACPI Version 6.3 Section 6.1: "A device object must contain either an _HID object or an _ADR object, but should not contain both."
Change-Id: Ifb777c09aeef09a6a4cbee254b081519f5b6c457 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/amd/agesa/family14/acpi/northbridge.asl M src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl M src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl M src/northbridge/amd/pi/00630F01/acpi/northbridge.asl M src/northbridge/amd/pi/00660F01/acpi/northbridge.asl M src/northbridge/amd/pi/00730F01/acpi/northbridge.asl M src/soc/amd/stoneyridge/acpi/northbridge.asl M src/soc/intel/broadwell/acpi/serialio.asl M src/southbridge/intel/lynxpoint/acpi/serialio.asl 9 files changed, 9 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/36318/11
Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36318 )
Change subject: {northbridge,soc,southbridge}: Don't use both of _ADR and _HID ......................................................................
Patch Set 12: Code-Review+2
Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36318 )
Change subject: {northbridge,soc,southbridge}: Don't use both of _ADR and _HID ......................................................................
{northbridge,soc,southbridge}: Don't use both of _ADR and _HID
ACPI Version 6.3 Section 6.1: "A device object must contain either an _HID object or an _ADR object, but should not contain both."
Change-Id: Ifb777c09aeef09a6a4cbee254b081519f5b6c457 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/36318 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Martin Roth martinroth@google.com --- M src/northbridge/amd/agesa/family14/acpi/northbridge.asl M src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl M src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl M src/northbridge/amd/pi/00630F01/acpi/northbridge.asl M src/northbridge/amd/pi/00660F01/acpi/northbridge.asl M src/northbridge/amd/pi/00730F01/acpi/northbridge.asl M src/soc/amd/stoneyridge/acpi/northbridge.asl M src/soc/intel/broadwell/acpi/serialio.asl M src/southbridge/intel/lynxpoint/acpi/serialio.asl 9 files changed, 9 insertions(+), 25 deletions(-)
Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved
diff --git a/src/northbridge/amd/agesa/family14/acpi/northbridge.asl b/src/northbridge/amd/agesa/family14/acpi/northbridge.asl index 06199a1..fad157d 100644 --- a/src/northbridge/amd/agesa/family14/acpi/northbridge.asl +++ b/src/northbridge/amd/agesa/family14/acpi/northbridge.asl @@ -16,7 +16,7 @@ /* Note: Only need HID on Primary Bus */ External (TOM1) External (TOM2) -Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */ +/* Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge */ Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
@@ -125,7 +125,6 @@
/* Northbridge function 3 */ Device(NBF3) { - Name(_ADR, 0x00180003)
/* k10temp thermal zone */ #include "thermal_mixin.asl" diff --git a/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl b/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl index 9a1fa9e..96c2d8b 100644 --- a/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl +++ b/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl @@ -16,7 +16,7 @@ /* Note: Only need HID on Primary Bus */ External (TOM1) External (TOM2) -Name(_HID, EISAID("PNP0A03")) /* PCI Express Root Bridge */ +/* Name(_HID, EISAID("PNP0A03")) // PCI Express Root Bridge */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
/* Describe the Northbridge devices */ diff --git a/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl b/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl index f74b31a..a7e8307 100644 --- a/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl +++ b/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl @@ -16,7 +16,7 @@ /* Note: Only need HID on Primary Bus */ External (TOM1) External (TOM2) -Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */ +/* Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge */ Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
diff --git a/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl index c2b3aac..de47bc2 100644 --- a/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl +++ b/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl @@ -16,7 +16,7 @@ /* Note: Only need HID on Primary Bus */ External (TOM1) External (TOM2) -Name(_HID, EISAID("PNP0A03")) /* PCI Express Root Bridge */ +/* Name(_HID, EISAID("PNP0A03")) // PCI Express Root Bridge */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
/* Describe the Northbridge devices */ diff --git a/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl index d54f985..4a48aaf 100644 --- a/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl +++ b/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl @@ -16,7 +16,7 @@ /* Note: Only need HID on Primary Bus */ External (TOM1) External (TOM2) -Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */ +/* Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge */ Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
diff --git a/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl index f74b31a..b317ccf 100644 --- a/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl +++ b/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl @@ -16,10 +16,9 @@ /* Note: Only need HID on Primary Bus */ External (TOM1) External (TOM2) -Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */ +/* Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge */ Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ - /* Describe the Northbridge devices */
Method(_BBN, 0, NotSerialized) /* Bus number = 0 */ diff --git a/src/soc/amd/stoneyridge/acpi/northbridge.asl b/src/soc/amd/stoneyridge/acpi/northbridge.asl index fe78534..09bf2e1 100644 --- a/src/soc/amd/stoneyridge/acpi/northbridge.asl +++ b/src/soc/amd/stoneyridge/acpi/northbridge.asl @@ -17,7 +17,7 @@ /* Note: Only need HID on Primary Bus */ External (TOM1) External (TOM2) -Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */ +/* Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge */ Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
diff --git a/src/soc/intel/broadwell/acpi/serialio.asl b/src/soc/intel/broadwell/acpi/serialio.asl index 1b44e95..fd25b0d 100644 --- a/src/soc/intel/broadwell/acpi/serialio.asl +++ b/src/soc/intel/broadwell/acpi/serialio.asl @@ -157,7 +157,7 @@ Device (SDMA) { // Serial IO DMA Controller - Name (_HID, "INTL9C60") + /* Name (_HID, "INTL9C60") */ Name (_UID, 1) Name (_ADR, 0x00150000)
@@ -205,7 +205,6 @@ Return ("INT33C2") } Name (_UID, 1) - Name (_ADR, 0x00150001)
Name (SSCN, Package () { 432, 507, 30 }) Name (FMCN, Package () { 72, 160, 30 }) @@ -276,7 +275,6 @@ Return ("INT33C3") } Name (_UID, 1) - Name (_ADR, 0x00150002)
Name (SSCN, Package () { 432, 507, 30 }) Name (FMCN, Package () { 72, 160, 30 }) @@ -347,7 +345,6 @@ Return ("INT33C0") } Name (_UID, 1) - Name (_ADR, 0x00150003)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -403,7 +400,6 @@ Return ("INT33C1") } Name (_UID, 1) - Name (_ADR, 0x00150004)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -471,7 +467,6 @@ Return ("INT33C4") } Name (_UID, 1) - Name (_ADR, 0x00150005)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -539,7 +534,6 @@ Return ("INT33C5") } Name (_UID, 1) - Name (_ADR, 0x00150006)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -596,7 +590,6 @@ } Name (_CID, "PNP0D40") Name (_UID, 1) - Name (_ADR, 0x00170000)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () diff --git a/src/southbridge/intel/lynxpoint/acpi/serialio.asl b/src/southbridge/intel/lynxpoint/acpi/serialio.asl index 9323b91..0eebe32 100644 --- a/src/southbridge/intel/lynxpoint/acpi/serialio.asl +++ b/src/southbridge/intel/lynxpoint/acpi/serialio.asl @@ -123,7 +123,7 @@ Device (SDMA) { // Serial IO DMA Controller - Name (_HID, "INTL9C60") + /* Name (_HID, "INTL9C60") */ Name (_UID, 1) Name (_ADR, 0x00150000)
@@ -163,7 +163,6 @@ Name (_HID, "INT33C2") Name (_CID, "INT33C2") Name (_UID, 1) - Name (_ADR, 0x00150001)
Name (SSCN, Package () { 432, 507, 30 }) Name (FMCN, Package () { 72, 160, 30 }) @@ -245,7 +244,6 @@ Name (_HID, "INT33C3") Name (_CID, "INT33C3") Name (_UID, 1) - Name (_ADR, 0x00150002)
Name (SSCN, Package () { 432, 507, 30 }) Name (FMCN, Package () { 72, 160, 30 }) @@ -327,7 +325,6 @@ Name (_HID, "INT33C0") Name (_CID, "INT33C0") Name (_UID, 1) - Name (_ADR, 0x00150003)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -365,7 +362,6 @@ Name (_HID, "INT33C1") Name (_CID, "INT33C1") Name (_UID, 1) - Name (_ADR, 0x00150004)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -416,7 +412,6 @@ Name (_HID, "INT33C4") Name (_CID, "INT33C4") Name (_UID, 1) - Name (_ADR, 0x00150005)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -467,7 +462,6 @@ Name (_HID, "INT33C5") Name (_CID, "INT33C5") Name (_UID, 1) - Name (_ADR, 0x00150006)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -505,7 +499,6 @@ Name (_HID, "INT33C6") Name (_CID, "PNP0D40") Name (_UID, 1) - Name (_ADR, 0x00170000)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate ()
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36318 )
Change subject: {northbridge,soc,southbridge}: Don't use both of _ADR and _HID ......................................................................
Patch Set 13:
(2 comments)
https://review.coreboot.org/c/coreboot/+/36318/13/src/northbridge/amd/agesa/... File src/northbridge/amd/agesa/family14/acpi/northbridge.asl:
https://review.coreboot.org/c/coreboot/+/36318/13/src/northbridge/amd/agesa/... PS13, Line 21: Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ This looks like the address of a device on the bus not like the bus.
https://review.coreboot.org/c/coreboot/+/36318/13/src/soc/intel/broadwell/ac... File src/soc/intel/broadwell/acpi/serialio.asl:
https://review.coreboot.org/c/coreboot/+/36318/13/src/soc/intel/broadwell/ac... PS13, Line 208: Name (_ADR, 0x00150001) This (and all the other serial i/o PCI devices) should depend on `sio_acpi_mode` (see `chip.h`), afaict.
Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36318 )
Change subject: {northbridge,soc,southbridge}: Don't use both of _ADR and _HID ......................................................................
Patch Set 13:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36318/13/src/northbridge/amd/agesa/... File src/northbridge/amd/agesa/family14/acpi/northbridge.asl:
https://review.coreboot.org/c/coreboot/+/36318/13/src/northbridge/amd/agesa/... PS13, Line 21: Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
This looks like the address of a device on the bus not like the bus.
Exactly. Fix available in CB:37835
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HAOUAS Elyes (Code Review) -
Martin Roth (Code Review)
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Michał Żygowski (Code Review)
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Nico Huber (Code Review)
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Patrick Georgi (Code Review)