[M] Change in coreboot[master]: amdfwtool: Add the new entry type for new family morgana
Attention is currently required from: Zheng Bao.
Hello Zheng Bao,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/69045
to review the following change.
Change subject: amdfwtool: Add the new entry type for new family morgana ......................................................................
amdfwtool: Add the new entry type for new family morgana
Change-Id: I7565c5eda75b332a48613440d7e4cfb388d5012f Signed-off-by: Zheng Bao fishbaozi@gmail.com --- M util/amdfwtool/amdfwtool.c M util/amdfwtool/amdfwtool.h M util/amdfwtool/data_parse.c 3 files changed, 108 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/69045/1
diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 72f6852..5ac52a9 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -252,6 +252,10 @@ { .type = AMD_FW_PSP_SMU_FIRMWARE2, .level = PSP_BOTH | PSP_LVL2_AB }, { .type = AMD_FW_PSP_SMU_FIRMWARE2, .subprog = 1, .level = PSP_BOTH | PSP_LVL2_AB }, { .type = AMD_FW_PSP_SMU_FIRMWARE2, .subprog = 2, .level = PSP_BOTH | PSP_LVL2_AB }, + { .type = AMD_BOOT_DRIVER, .level = PSP_BOTH | PSP_LVL2_AB }, + { .type = AMD_SOC_DRIVER, .level = PSP_BOTH | PSP_LVL2_AB }, + { .type = AMD_DEBUG_DRIVER, .level = PSP_BOTH | PSP_LVL2_AB }, + { .type = AMD_INTERFACE_DRIVER, .level = PSP_BOTH | PSP_LVL2_AB }, { .type = AMD_DEBUG_UNLOCK, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_HW_IPCFG, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_WRAPPED_IKEK, .level = PSP_BOTH | PSP_LVL2_AB, .skip_hashing = true }, @@ -288,10 +292,23 @@ { .type = AMD_FW_DMCU_ISR, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_MSMU, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_SPIROM_CFG, .level = PSP_LVL2 | PSP_LVL2_AB }, - { .type = AMD_FW_PSP_SMUSCS, .level = PSP_BOTH }, + { .type = AMD_FW_MPIO, .level = PSP_LVL2 | PSP_LVL2_AB }, + /* Same as AMD_FW_TPMLITE */ + { .type = AMD_FW_PSP_SMUSCS, .level = PSP_BOTH | PSP_LVL2_AB }, { .type = AMD_FW_DMCUB, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_PSP_BOOTLOADER_AB, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_RIB, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_AMF_SRAM, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_MPM, .inst = 0, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_MPM, .inst = 1, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_MPM_WLAN, .inst = 0, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_MPM_WLAN, .inst = 1, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_MPM_AMF, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_TA_IKEK, .level = PSP_BOTH | PSP_LVL2_AB, .skip_hashing = true }, + { .type = AMD_FW_MPCCX, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_LSDMA, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_C20_MP, .level = PSP_BOTH | PSP_LVL2_AB }, + { .type = AMD_FW_SRAM_FW_EXT, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_INVALID }, };
@@ -345,8 +362,16 @@ { .type = AMD_BIOS_PMUD, .inst = 1, .subpr = 0, .level = BDT_BOTH }, { .type = AMD_BIOS_PMUI, .inst = 2, .subpr = 0, .level = BDT_BOTH }, { .type = AMD_BIOS_PMUD, .inst = 2, .subpr = 0, .level = BDT_BOTH }, + { .type = AMD_BIOS_PMUI, .inst = 3, .subpr = 0, .level = BDT_BOTH }, + { .type = AMD_BIOS_PMUD, .inst = 3, .subpr = 0, .level = BDT_BOTH }, { .type = AMD_BIOS_PMUI, .inst = 4, .subpr = 0, .level = BDT_BOTH }, { .type = AMD_BIOS_PMUD, .inst = 4, .subpr = 0, .level = BDT_BOTH }, + { .type = AMD_BIOS_PMUI, .inst = 5, .subpr = 0, .level = BDT_BOTH }, + { .type = AMD_BIOS_PMUD, .inst = 5, .subpr = 0, .level = BDT_BOTH }, + { .type = AMD_BIOS_PMUI, .inst = 6, .subpr = 0, .level = BDT_BOTH }, + { .type = AMD_BIOS_PMUD, .inst = 6, .subpr = 0, .level = BDT_BOTH }, + { .type = AMD_BIOS_PMUI, .inst = 7, .subpr = 0, .level = BDT_BOTH }, + { .type = AMD_BIOS_PMUD, .inst = 7, .subpr = 0, .level = BDT_BOTH }, { .type = AMD_BIOS_PMUI, .inst = 1, .subpr = 1, .level = BDT_BOTH }, { .type = AMD_BIOS_PMUD, .inst = 1, .subpr = 1, .level = BDT_BOTH }, { .type = AMD_BIOS_PMUI, .inst = 2, .subpr = 1, .level = BDT_BOTH }, diff --git a/util/amdfwtool/amdfwtool.h b/util/amdfwtool/amdfwtool.h index 07e3cd3..9485880 100644 --- a/util/amdfwtool/amdfwtool.h +++ b/util/amdfwtool/amdfwtool.h @@ -22,6 +22,10 @@ AMD_FW_PSP_TRUSTLETKEY = 0x0d, AMD_FW_PSP_SMU_FIRMWARE2 = 0x12, AMD_DEBUG_UNLOCK = 0x13, + AMD_BOOT_DRIVER = 0x1B, + AMD_SOC_DRIVER = 0x1C, + AMD_DEBUG_DRIVER = 0x1D, + AMD_INTERFACE_DRIVER = 0x1F, AMD_HW_IPCFG = 0x20, AMD_WRAPPED_IKEK = 0x21, AMD_TOKEN_UNLOCK = 0x22, @@ -57,10 +61,22 @@ AMD_FW_DMCU_ISR = 0x59, AMD_FW_MSMU = 0x5a, AMD_FW_SPIROM_CFG = 0x5c, + AMD_FW_MPIO = 0x5D, + AMD_FW_TPMLITE = 0x5F, AMD_FW_PSP_SMUSCS = 0x5f, AMD_FW_DMCUB = 0x71, AMD_FW_PSP_BOOTLOADER_AB = 0x73, + AMD_FW_RIB = 0x76, + AMD_FW_AMF_SRAM = 0x85, + AMD_FW_MPM = 0x86, + AMD_FW_MPM_WLAN = 0x88, + AMD_FW_MPM_AMF = 0x89, AMD_TA_IKEK = 0x8d, + AMD_FW_MPCCX = 0x90, + AMD_FW_LSDMA = 0x94, + AMD_FW_C20_MP = 0x95, + AMD_FW_FCFG_TABLE = 0x98, + AMD_FW_SRAM_FW_EXT = 0x9D, AMD_FW_IMC = 0x200, /* Large enough to be larger than the top BHD entry type. */ AMD_FW_GEC, AMD_FW_XHCI, diff --git a/util/amdfwtool/data_parse.c b/util/amdfwtool/data_parse.c index 0609be8..4db2291 100644 --- a/util/amdfwtool/data_parse.c +++ b/util/amdfwtool/data_parse.c @@ -171,6 +171,18 @@ } else if (strcmp(fw_name, "PSP_SMUFW2_SUB2_FILE") == 0) { fw_type = AMD_FW_PSP_SMU_FIRMWARE2; subprog = 2; + } else if (strcmp(fw_name, "PSP_BOOT_DRIVER_FILE") == 0) { + fw_type = AMD_BOOT_DRIVER; + subprog = 0; + } else if (strcmp(fw_name, "PSP_SOC_DRIVER_FILE") == 0) { + fw_type = AMD_SOC_DRIVER; + subprog = 0; + } else if (strcmp(fw_name, "PSP_DEBUG_DRIVER_FILE") == 0) { + fw_type = AMD_DEBUG_DRIVER; + subprog = 0; + } else if (strcmp(fw_name, "PSP_INTERFACE_DRIVER_FILE") == 0) { + fw_type = AMD_INTERFACE_DRIVER; + subprog = 0; } else if (strcmp(fw_name, "PSP_SEC_DBG_KEY_FILE") == 0) { if (cb_config->unlock_secure) { fw_type = AMD_FW_PSP_SECURED_DEBUG; @@ -263,6 +275,43 @@ } else { fw_type = AMD_FW_SKIP; } + } else if (strcmp(fw_name, "PSP_C20MP_FILE") == 0) { + fw_type = AMD_FW_C20_MP; + subprog = 0; + } else if (strcmp(fw_name, "RIB_FILE") == 0) { + fw_type = AMD_FW_RIB; + subprog = 0; + } else if (strcmp(fw_name, "AMF_SRAM_FILE") == 0) { + fw_type = AMD_FW_AMF_SRAM; + subprog = 0; + } else if (strcmp(fw_name, "MPM_FILE_INS0") == 0) { + fw_type = AMD_FW_MPM; + subprog = 0; + instance = 0; + } else if (strcmp(fw_name, "MPM_FILE_INS1") == 0) { + fw_type = AMD_FW_MPM; + subprog = 0; + instance = 1; + } else if (strcmp(fw_name, "MPM_WLAN_FILE_INS0") == 0) { + fw_type = AMD_FW_MPM_WLAN; + subprog = 0; + instance = 0; + } else if (strcmp(fw_name, "MPM_WLAN_FILE_INS1") == 0) { + fw_type = AMD_FW_MPM_WLAN; + subprog = 0; + instance = 1; + } else if (strcmp(fw_name, "MPM_AMF_FILE") == 0) { + fw_type = AMD_FW_MPM_AMF; + subprog = 0; + } else if (strcmp(fw_name, "MPCCX_FILE") == 0) { + fw_type = AMD_FW_MPCCX; + subprog = 0; + } else if (strcmp(fw_name, "LSDMA_FILE") == 0) { + fw_type = AMD_FW_LSDMA; + subprog = 0; + } else if (strcmp(fw_name, "SRAM_FW_EXT_FILE") == 0) { + fw_type = AMD_FW_SRAM_FW_EXT; + subprog = 0; } else if (strcmp(fw_name, "PSP_DRIVERS_FILE") == 0) { fw_type = AMD_DRIVER_ENTRIES; subprog = 0; @@ -316,6 +365,13 @@ } else if (strcmp(fw_name, "SPIROM_CONFIG_FILE") == 0) { fw_type = AMD_FW_SPIROM_CFG; subprog = 0; + } else if (strcmp(fw_name, "MPIO_FILE") == 0) { + fw_type = AMD_FW_MPIO; + subprog = 0; + } else if (strcmp(fw_name, "TPMLITE_FILE") == 0) { + printf("TPMLITE\n"); + fw_type = AMD_FW_TPMLITE; + subprog = 0; } else if (strcmp(fw_name, "PSP_KVM_ENGINE_DUMMY_FILE") == 0) { fw_type = AMD_FW_KVM_IMAGE; subprog = 0;
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Bao Zheng (Code Review)