Change in coreboot[master]: soc/intel/{icl,tgl}: Make use of print_me_fw_version() from CSE lib

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/39147 )

Change subject: soc/intel/{icl,tgl}: Make use of print_me_fw_version() from CSE lib
......................................................................

soc/intel/{icl,tgl}: Make use of print_me_fw_version() from CSE lib

Make use of print_me_fw_version() which is defined in the CSE lib to
print ME firmware version information for icl,tgl.

BUG=None
BRANCH=None
TEST=Build and boot iclrvp, tglrvp boards.

Change-Id: Ief75403c490eee499a84372e54fa38ea3016cc11
Signed-off-by: Krishna Prasad Bhat 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39147
Tested-by: build bot (Jenkins) 
Reviewed-by: Rizwan Qureshi 
Reviewed-by: Wonkyu Kim 
Reviewed-by: Sridhar Siricilla 
Reviewed-by: Subrata Banik 
---
M src/soc/intel/icelake/Makefile.inc
A src/soc/intel/icelake/me.c
M src/soc/intel/tigerlake/Makefile.inc
A src/soc/intel/tigerlake/me.c
4 files changed, 40 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Rizwan Qureshi: Looks good to me, approved
  Subrata Banik: Looks good to me, approved
  Wonkyu Kim: Looks good to me, approved
  Sridhar Siricilla: Looks good to me, but someone else must approve

diff --git a/src/soc/intel/icelake/Makefile.inc b/src/soc/intel/icelake/Makefile.inc
index 67a3a71..f30816e 100644
--- a/src/soc/intel/icelake/Makefile.inc
+++ b/src/soc/intel/icelake/Makefile.inc
@@ -43,6 +43,7 @@
 ramstage-y += smmrelocate.c
 ramstage-y += systemagent.c
 ramstage-y += sd.c
+ramstage-y += me.c

smm-y += gpio.c
 smm-y += p2sb.c
diff --git a/src/soc/intel/icelake/me.c b/src/soc/intel/icelake/me.c
new file mode 100644
index 0000000..d48b32b
--- /dev/null
+++ b/src/soc/intel/icelake/me.c
@@ -0,0 +1,19 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2020 Google LLC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootstate.h>
+#include <intelblocks/cse.h>
+
+BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_EXIT, print_me_fw_version, NULL);
diff --git a/src/soc/intel/tigerlake/Makefile.inc b/src/soc/intel/tigerlake/Makefile.inc
index fd2464d..4aa1f2f 100644
--- a/src/soc/intel/tigerlake/Makefile.inc
+++ b/src/soc/intel/tigerlake/Makefile.inc
@@ -44,6 +44,7 @@
 ramstage-y += smmrelocate.c
 ramstage-y += systemagent.c
 ramstage-y += sd.c
+ramstage-y += me.c

smm-y += gpio.c
 smm-y += p2sb.c
diff --git a/src/soc/intel/tigerlake/me.c b/src/soc/intel/tigerlake/me.c
new file mode 100644
index 0000000..d48b32b
--- /dev/null
+++ b/src/soc/intel/tigerlake/me.c
@@ -0,0 +1,19 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2020 Google LLC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootstate.h>
+#include <intelblocks/cse.h>
+
+BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_EXIT, print_me_fw_version, NULL);