Kevin Chiu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45519 )
Change subject: soc/amd/picasso: Add THERMCTL_LIMIT DPTC parameter support ......................................................................
soc/amd/picasso: Add THERMCTL_LIMIT DPTC parameter support
Add THERMCTL_LIMIT (die temperature limit) DPTC parameter for clamshell/tablet mode.
BUG=b:157943445 BRANCH=master TEST=build
Change-Id: Id193a74210c92d1e45ed4824ee9c0fc9ceaa5e3a Signed-off-by: Kevin Chiu kevin.chiu@quantatw.com --- M src/soc/amd/picasso/chip.h M src/soc/amd/picasso/root_complex.c 2 files changed, 11 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/45519/1
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h index 1167509..8fe5269 100644 --- a/src/soc/amd/picasso/chip.h +++ b/src/soc/amd/picasso/chip.h @@ -97,6 +97,7 @@ uint32_t fast_ppt_limit_tablet_mode; uint32_t slow_ppt_limit_tablet_mode; uint32_t sustained_power_limit_tablet_mode; + uint32_t thermctl_limit_tablet_mode;
/* PROCHOT_L de-assertion Ramp Time */ uint32_t prochot_l_deassertion_ramp_time; diff --git a/src/soc/amd/picasso/root_complex.c b/src/soc/amd/picasso/root_complex.c index 6c721e1..9c94b07 100644 --- a/src/soc/amd/picasso/root_complex.c +++ b/src/soc/amd/picasso/root_complex.c @@ -17,10 +17,11 @@
enum { ALIB_DPTCI_FUNCTION_ID = 0xc, + THERMAL_CONTROL_LIMIT_ID = 0x3, SUSTAINED_POWER_LIMIT_PARAM_ID = 0x5, FAST_PPT_LIMIT_PARAM_ID = 0x6, SLOW_PPT_LIMIT_PARAM_ID = 0x7, - DPTC_TOTAL_UPDATE_PARAMS = 3, + DPTC_TOTAL_UPDATE_PARAMS = 4, };
struct dptc_param { @@ -33,11 +34,15 @@ struct dptc_param params[DPTC_TOTAL_UPDATE_PARAMS]; } __packed;
-#define DPTC_INPUTS(_sustained, _fast, _slow) \ +#define DPTC_INPUTS(_thermctllmit, _sustained, _fast, _slow) \ { \ .size = sizeof(struct dptc_input), \ .params = { \ { \ + .id = THERMAL_CONTROL_LIMIT_ID, \ + .value = _thermctllmit, \ + }, \ + { \ .id = SUSTAINED_POWER_LIMIT_PARAM_ID, \ .value = _sustained, \ }, \ @@ -195,10 +200,12 @@ if (!config->dptc_enable) return;
- struct dptc_input default_input = DPTC_INPUTS(config->sustained_power_limit, + struct dptc_input default_input = DPTC_INPUTS(config->thermctl_limit, + config->sustained_power_limit, config->fast_ppt_limit, config->slow_ppt_limit); struct dptc_input tablet_mode_input = DPTC_INPUTS( + config->thermctl_limit_tablet_mode, config->sustained_power_limit_tablet_mode, config->fast_ppt_limit_tablet_mode, config->slow_ppt_limit_tablet_mode);
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45519 )
Change subject: soc/amd/picasso: Add THERMCTL_LIMIT DPTC parameter support ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45519/1/src/soc/amd/picasso/root_co... File src/soc/amd/picasso/root_complex.c:
https://review.coreboot.org/c/coreboot/+/45519/1/src/soc/amd/picasso/root_co... PS1, Line 37: #define DPTC_INPUTS(_thermctllmit, _sustained, _fast, _slow) \ line over 96 characters
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45519 )
Change subject: soc/amd/picasso: Add THERMCTL_LIMIT DPTC parameter support ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45519/1/src/soc/amd/picasso/chip.h File src/soc/amd/picasso/chip.h:
https://review.coreboot.org/c/coreboot/+/45519/1/src/soc/amd/picasso/chip.h@... PS1, Line 100: uint32_t thermctl_limit_tablet_mode; Should we move this to around line 114 so the 2 configs are closer to one another?
Hello build bot (Jenkins), Martin Roth, Furquan Shaikh, Keith Tzeng, Aaron Durbin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45519
to look at the new patch set (#2).
Change subject: soc/amd/picasso: Add THERMCTL_LIMIT DPTC parameter support ......................................................................
soc/amd/picasso: Add THERMCTL_LIMIT DPTC parameter support
Add THERMCTL_LIMIT (die temperature limit) DPTC parameter for clamshell/tablet mode.
BUG=b:157943445 BRANCH=master TEST=build
Change-Id: Id193a74210c92d1e45ed4824ee9c0fc9ceaa5e3a Signed-off-by: Kevin Chiu kevin.chiu@quantatw.com --- M src/soc/amd/picasso/chip.h M src/soc/amd/picasso/root_complex.c 2 files changed, 11 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/45519/2
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45519 )
Change subject: soc/amd/picasso: Add THERMCTL_LIMIT DPTC parameter support ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45519/2/src/soc/amd/picasso/root_co... File src/soc/amd/picasso/root_complex.c:
https://review.coreboot.org/c/coreboot/+/45519/2/src/soc/amd/picasso/root_co... PS2, Line 37: #define DPTC_INPUTS(_thermctllmit, _sustained, _fast, _slow) \ line over 96 characters
Kevin Chiu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45519 )
Change subject: soc/amd/picasso: Add THERMCTL_LIMIT DPTC parameter support ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45519/1/src/soc/amd/picasso/chip.h File src/soc/amd/picasso/chip.h:
https://review.coreboot.org/c/coreboot/+/45519/1/src/soc/amd/picasso/chip.h@... PS1, Line 100: uint32_t thermctl_limit_tablet_mode;
Should we move this to around line 114 so the 2 configs are closer to one another?
Done
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45519 )
Change subject: soc/amd/picasso: Add THERMCTL_LIMIT DPTC parameter support ......................................................................
Patch Set 2: Code-Review+2
(2 comments)
https://review.coreboot.org/c/coreboot/+/45519/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45519/2//COMMIT_MSG@13 PS2, Line 13: master zork
https://review.coreboot.org/c/coreboot/+/45519/2/src/soc/amd/picasso/root_co... File src/soc/amd/picasso/root_complex.c:
https://review.coreboot.org/c/coreboot/+/45519/2/src/soc/amd/picasso/root_co... PS2, Line 37: Drop some tabs to bring the character count < 96 characters?
Hello build bot (Jenkins), Furquan Shaikh, Martin Roth, Keith Tzeng, Aaron Durbin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45519
to look at the new patch set (#3).
Change subject: soc/amd/picasso: Add THERMCTL_LIMIT DPTC parameter support ......................................................................
soc/amd/picasso: Add THERMCTL_LIMIT DPTC parameter support
Add THERMCTL_LIMIT (die temperature limit) DPTC parameter for clamshell/tablet mode.
BUG=b:157943445 BRANCH=zork TEST=build
Change-Id: Id193a74210c92d1e45ed4824ee9c0fc9ceaa5e3a Signed-off-by: Kevin Chiu kevin.chiu@quantatw.com --- M src/soc/amd/picasso/chip.h M src/soc/amd/picasso/root_complex.c 2 files changed, 11 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/45519/3
Kevin Chiu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45519 )
Change subject: soc/amd/picasso: Add THERMCTL_LIMIT DPTC parameter support ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/45519/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45519/2//COMMIT_MSG@13 PS2, Line 13: master
zork
Done
https://review.coreboot.org/c/coreboot/+/45519/2/src/soc/amd/picasso/root_co... File src/soc/amd/picasso/root_complex.c:
https://review.coreboot.org/c/coreboot/+/45519/2/src/soc/amd/picasso/root_co... PS2, Line 37:
Drop some tabs to bring the character count < 96 characters?
Done
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45519 )
Change subject: soc/amd/picasso: Add THERMCTL_LIMIT DPTC parameter support ......................................................................
Patch Set 3: Code-Review+2
Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45519 )
Change subject: soc/amd/picasso: Add THERMCTL_LIMIT DPTC parameter support ......................................................................
soc/amd/picasso: Add THERMCTL_LIMIT DPTC parameter support
Add THERMCTL_LIMIT (die temperature limit) DPTC parameter for clamshell/tablet mode.
BUG=b:157943445 BRANCH=zork TEST=build
Change-Id: Id193a74210c92d1e45ed4824ee9c0fc9ceaa5e3a Signed-off-by: Kevin Chiu kevin.chiu@quantatw.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/45519 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com --- M src/soc/amd/picasso/chip.h M src/soc/amd/picasso/root_complex.c 2 files changed, 11 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h index 1167509..9c9ae7f 100644 --- a/src/soc/amd/picasso/chip.h +++ b/src/soc/amd/picasso/chip.h @@ -111,6 +111,7 @@
/* Lower die temperature limit */ uint32_t thermctl_limit; + uint32_t thermctl_limit_tablet_mode;
/* FP5 Processor Voltage Supply PSI Currents. 0 indicates use SOC default */ uint32_t psi0_current_limit; diff --git a/src/soc/amd/picasso/root_complex.c b/src/soc/amd/picasso/root_complex.c index 6c721e1..174cddc 100644 --- a/src/soc/amd/picasso/root_complex.c +++ b/src/soc/amd/picasso/root_complex.c @@ -17,10 +17,11 @@
enum { ALIB_DPTCI_FUNCTION_ID = 0xc, + THERMAL_CONTROL_LIMIT_ID = 0x3, SUSTAINED_POWER_LIMIT_PARAM_ID = 0x5, FAST_PPT_LIMIT_PARAM_ID = 0x6, SLOW_PPT_LIMIT_PARAM_ID = 0x7, - DPTC_TOTAL_UPDATE_PARAMS = 3, + DPTC_TOTAL_UPDATE_PARAMS = 4, };
struct dptc_param { @@ -33,11 +34,15 @@ struct dptc_param params[DPTC_TOTAL_UPDATE_PARAMS]; } __packed;
-#define DPTC_INPUTS(_sustained, _fast, _slow) \ +#define DPTC_INPUTS(_thermctllmit, _sustained, _fast, _slow) \ { \ .size = sizeof(struct dptc_input), \ .params = { \ { \ + .id = THERMAL_CONTROL_LIMIT_ID, \ + .value = _thermctllmit, \ + }, \ + { \ .id = SUSTAINED_POWER_LIMIT_PARAM_ID, \ .value = _sustained, \ }, \ @@ -195,10 +200,12 @@ if (!config->dptc_enable) return;
- struct dptc_input default_input = DPTC_INPUTS(config->sustained_power_limit, + struct dptc_input default_input = DPTC_INPUTS(config->thermctl_limit, + config->sustained_power_limit, config->fast_ppt_limit, config->slow_ppt_limit); struct dptc_input tablet_mode_input = DPTC_INPUTS( + config->thermctl_limit_tablet_mode, config->sustained_power_limit_tablet_mode, config->fast_ppt_limit_tablet_mode, config->slow_ppt_limit_tablet_mode);
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45519 )
Change subject: soc/amd/picasso: Add THERMCTL_LIMIT DPTC parameter support ......................................................................
Patch Set 4:
Automatic boot test returned (PASS/FAIL/TOTAL): 8/1/9 "QEMU x86 q35/ich9" (x86_32) using payload TianoCore : SUCCESS : https://lava.9esec.io/r/20092 "QEMU x86 q35/ich9" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/20091 "QEMU x86 i440fx/piix4" (x86_64) using payload SeaBIOS : FAIL : https://lava.9esec.io/r/20090 "QEMU x86 i440fx/piix4" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/20089 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/20088 "HP Z220 SFF Workstation" (x86_32) using payload LinuxBoot_BusyBox_kexec : SUCCESS : https://lava.9esec.io/r/20096 "HP Z220 SFF Workstation" (x86_32) using payload LinuxBoot_BusyBox_kexec : SUCCESS : https://lava.9esec.io/r/20095 "HP Compaq 8200 Elite SFF PC" (x86_32) using payload TianoCore : SUCCESS : https://lava.9esec.io/r/20094 "HP Compaq 8200 Elite SFF PC" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/20093
Please note: This test is under development and might not be accurate at all!