Change in coreboot[master]: soc/intel/common: Add support for CSE IOM/NPHY sub-parition update
Attention is currently required from: Tim Wawrzynczak, Julius Werner. Krishna P Bhat D has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59685 )
Change subject: soc/intel/common: Add support for CSE IOM/NPHY sub-parition update ......................................................................
Patch Set 18:
(7 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59685/comment/64b26422_6316d979 PS16, Line 15: 1.
nit: space after `1. […]
Done
https://review.coreboot.org/c/coreboot/+/59685/comment/26674806_8ea34c32 PS16, Line 20: 2.
nit: space after `2. […]
Done
https://review.coreboot.org/c/coreboot/+/59685/comment/42f5947e_4791ce37 PS16, Line 25: 1.coreboot will navigate through the CSE region, : identify the CSE’s NPHY FW version and BIOS NPHY version. : 2.Compare both versions, if there is a difference, CSE will trigger an : NPHY FW update. Otherwise, skips the NPHY FW update. : : IOM Update: : 1.coreboot will navigate through the CSE region, identify CSE's IOM : FW version and BIOS IOM version. : 2.Compares both versions, if there is a difference, coreboot will : trigger an IOM FW update.Otherwise, skip IOM FW update.
same here, spaces after `1. `, etc.
Done
File src/soc/intel/common/block/cse/cse_lite.c:
https://review.coreboot.org/c/coreboot/+/59685/comment/11850662_5faa870f PS16, Line 405: : __weak bool skip_cse_sub_part_update(void) : { : return false; : }
I think this makes sense if implementing this function is a rare edge case and most future SoCs usin […]
Done
https://review.coreboot.org/c/coreboot/+/59685/comment/45fb4d68_2c26571d PS16, Line 805:
true, the mmap is free
When fmap_locate_area_as_rdev_rw() is used to get the target region device, there is no mmap/munmap callbacks to get the mapping. https://chromium.googlesource.com/chromiumos/third_party/coreboot/+/refs/hea...
https://review.coreboot.org/c/coreboot/+/59685/comment/2d49247f_6b2ee747 PS16, Line 959: /* If SOC is not Alderlake A2, skip update */
Oops missed that one
Done
File src/soc/intel/common/block/include/intelblocks/cse.h:
https://review.coreboot.org/c/coreboot/+/59685/comment/88cdfcde_a71af80e PS16, Line 343: * Returns true if cse sub-parition update is required otherwise false.
This should clarify that this is a weak function and what the default behavior is if the platform do […]
Ack
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Krishna P Bhat D (Code Review)