[XS] Change in coreboot[main]: soc/intel: Use NEM+ effective way size for for ADL, MTL and PTL

[Jérémy Compostella (Code Review)]

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Paul Menzel, Pranava Y N, Rishika Raj, Sowmya Aralguppe, Subrata Banik, Tarun, Wonkyu Kim.

Jérémy Compostella has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/83947?usp=email )

Change subject: soc/intel: Use NEM+ effective way size for for ADL, MTL and PTL
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Patch Set 11:

(4 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/83947/comment/32237bed_6431da75?usp... :
PS11, Line 7: for the right platforms
> … for ADL, MTL, PTL

Done

https://review.coreboot.org/c/coreboot/+/83947/comment/7217187d_d27d9cf9?usp... :
PS11, Line 9: uses
> use

Done

https://review.coreboot.org/c/coreboot/+/83947/comment/98ffbec8_591865b0?usp... :
PS11, Line 11: Mode
> Fits on the line above?

Done

https://review.coreboot.org/c/coreboot/+/83947/comment/d9f2aa63_6a5a550b?usp... :
PS11, Line 14: TEST=Verified on PTL Intel reference platform
> How?

Added to the previous patch commit message.