EricR Lai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36195 )
Change subject: mb/google/drallion: Change touch enable default value ......................................................................
mb/google/drallion: Change touch enable default value
Change GPP_B21 default to low. This can prevent power leakage of non-touch sku.
BUG=b:142849034 BRANCH=N/A TEST=Measure the power of non-touch sku, check GPP_B21 is 0V. Boot up with touch sku and check touch funtional.
Signed-off-by: Eric Lai ericr_lai@compal.corp-partner.google.com Change-Id: I80a3e5dc224e4dab97c21fd469d8c3f2d3e774e0 --- M src/mainboard/google/drallion/variants/drallion/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/36195/1
diff --git a/src/mainboard/google/drallion/variants/drallion/gpio.c b/src/mainboard/google/drallion/variants/drallion/gpio.c index f0fc55e..e699e4b 100644 --- a/src/mainboard/google/drallion/variants/drallion/gpio.c +++ b/src/mainboard/google/drallion/variants/drallion/gpio.c @@ -78,7 +78,7 @@ /* GSPI0_MOSI */ PAD_NC(GPP_B18, NONE), /* GSPI1_CS# */ PAD_NC(GPP_B19, NONE), /* HDD_FALL_INT (nostuff) */ /* GSPI1_CLK */ PAD_NC(GPP_B20, NONE), -/* GSPI1_MISO */ PAD_CFG_GPO(GPP_B21, 1, PLTRST), /* PCH_3.3V_TS_EN */ +/* GSPI1_MISO */ PAD_CFG_GPO(GPP_B21, 0, PLTRST), /* PCH_3.3V_TS_EN */ /* GSPI1_MOSI */ PAD_NC(GPP_B22, NONE), /* SML1ALERT# */ PAD_NC(GPP_B23, DN_20K),
EricR Lai has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/36195 )
Change subject: mb/google/drallion: Change touch enable pin default value ......................................................................
mb/google/drallion: Change touch enable pin default value
Change GPP_B21 default to low. This can prevent power leakage of non-touch sku.
BUG=b:142849034 BRANCH=N/A TEST=Measure the power of non-touch sku, check GPP_B21 is 0V. Boot up with touch sku and check touch functional.
Signed-off-by: Eric Lai ericr_lai@compal.corp-partner.google.com Change-Id: I80a3e5dc224e4dab97c21fd469d8c3f2d3e774e0 --- M src/mainboard/google/drallion/variants/drallion/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/36195/2
Mathew King has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36195 )
Change subject: mb/google/drallion: Change touch enable pin default value ......................................................................
Patch Set 2: Code-Review+2
Roy Mingi Park has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36195 )
Change subject: mb/google/drallion: Change touch enable pin default value ......................................................................
Patch Set 2: Code-Review+1
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36195 )
Change subject: mb/google/drallion: Change touch enable pin default value ......................................................................
mb/google/drallion: Change touch enable pin default value
Change GPP_B21 default to low. This can prevent power leakage of non-touch sku.
BUG=b:142849034 BRANCH=N/A TEST=Measure the power of non-touch sku, check GPP_B21 is 0V. Boot up with touch sku and check touch functional.
Signed-off-by: Eric Lai ericr_lai@compal.corp-partner.google.com Change-Id: I80a3e5dc224e4dab97c21fd469d8c3f2d3e774e0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/36195 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Mathew King mathewk@chromium.org Reviewed-by: Roy Mingi Park roy.mingi.park@intel.com --- M src/mainboard/google/drallion/variants/drallion/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Roy Mingi Park: Looks good to me, but someone else must approve Mathew King: Looks good to me, approved
diff --git a/src/mainboard/google/drallion/variants/drallion/gpio.c b/src/mainboard/google/drallion/variants/drallion/gpio.c index f0fc55e..e699e4b 100644 --- a/src/mainboard/google/drallion/variants/drallion/gpio.c +++ b/src/mainboard/google/drallion/variants/drallion/gpio.c @@ -78,7 +78,7 @@ /* GSPI0_MOSI */ PAD_NC(GPP_B18, NONE), /* GSPI1_CS# */ PAD_NC(GPP_B19, NONE), /* HDD_FALL_INT (nostuff) */ /* GSPI1_CLK */ PAD_NC(GPP_B20, NONE), -/* GSPI1_MISO */ PAD_CFG_GPO(GPP_B21, 1, PLTRST), /* PCH_3.3V_TS_EN */ +/* GSPI1_MISO */ PAD_CFG_GPO(GPP_B21, 0, PLTRST), /* PCH_3.3V_TS_EN */ /* GSPI1_MOSI */ PAD_NC(GPP_B22, NONE), /* SML1ALERT# */ PAD_NC(GPP_B23, DN_20K),
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EricR Lai (Code Review) -
Mathew King (Code Review)
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Patrick Georgi (Code Review)
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Roy Mingi Park (Code Review)