EricR Lai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38742 )
Change subject: mb/google/drallion: Tuning WWAN power sequence ......................................................................
mb/google/drallion: Tuning WWAN power sequence
Change GPP_C10 from pltrst to deep to meet the warnboot power sequence.
BUG=b:146935222 TEST=measure WWAN power sequence is meet spec
Signed-off-by: Eric Lai ericr_lai@compal.corp-partner.google.com Change-Id: Ia1513ed38fbc1c99a10a5fa531a78cc92a3ebfc2 --- M src/mainboard/google/drallion/variants/drallion/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/38742/1
diff --git a/src/mainboard/google/drallion/variants/drallion/gpio.c b/src/mainboard/google/drallion/variants/drallion/gpio.c index 1c864ca..85de173 100644 --- a/src/mainboard/google/drallion/variants/drallion/gpio.c +++ b/src/mainboard/google/drallion/variants/drallion/gpio.c @@ -88,7 +88,7 @@ /* SML0CLK */ PAD_NC(GPP_C3, NONE), /* SML0DATA */ PAD_NC(GPP_C4, NONE), /* SML0ALERT# */ PAD_CFG_GPI(GPP_C5, NONE, DEEP), -/* UART0_RTS# */ PAD_CFG_GPO(GPP_C10, 1, PLTRST), /* WWAN_FULL_PWR_EN */ +/* UART0_RTS# */ PAD_CFG_GPO(GPP_C10, 1, DEEP), /* WWAN_FULL_PWR_EN */ /* UART0_CTS# */ PAD_NC(GPP_C11, NONE), /* UART1_RXD */ PAD_NC(GPP_C12, NONE), /* UART1_TXD */ PAD_NC(GPP_C13, NONE),
EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38742 )
Change subject: mb/google/drallion: Tuning WWAN power sequence ......................................................................
Patch Set 1:
Follow Sarien WWAN_FULL_PWR_EN setting. Please help review this.
Hello Mathew King, Duncan Laurie,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38742
to look at the new patch set (#2).
Change subject: mb/google/drallion: Tuning WWAN power sequence ......................................................................
mb/google/drallion: Tuning WWAN power sequence
Change GPP_C10 from pltrst to deep to meet the warmboot power sequence.
BUG=b:146935222 TEST=measure WWAN power sequence is meet spec
Signed-off-by: Eric Lai ericr_lai@compal.corp-partner.google.com Change-Id: Ia1513ed38fbc1c99a10a5fa531a78cc92a3ebfc2 --- M src/mainboard/google/drallion/variants/drallion/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/38742/2
Mathew King has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38742 )
Change subject: mb/google/drallion: Tuning WWAN power sequence ......................................................................
Patch Set 2: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38742 )
Change subject: mb/google/drallion: Tuning WWAN power sequence ......................................................................
mb/google/drallion: Tuning WWAN power sequence
Change GPP_C10 from pltrst to deep to meet the warmboot power sequence.
BUG=b:146935222 TEST=measure WWAN power sequence is meet spec
Signed-off-by: Eric Lai ericr_lai@compal.corp-partner.google.com Change-Id: Ia1513ed38fbc1c99a10a5fa531a78cc92a3ebfc2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/38742 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Mathew King mathewk@chromium.org --- M src/mainboard/google/drallion/variants/drallion/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Mathew King: Looks good to me, approved
diff --git a/src/mainboard/google/drallion/variants/drallion/gpio.c b/src/mainboard/google/drallion/variants/drallion/gpio.c index 1c864ca..85de173 100644 --- a/src/mainboard/google/drallion/variants/drallion/gpio.c +++ b/src/mainboard/google/drallion/variants/drallion/gpio.c @@ -88,7 +88,7 @@ /* SML0CLK */ PAD_NC(GPP_C3, NONE), /* SML0DATA */ PAD_NC(GPP_C4, NONE), /* SML0ALERT# */ PAD_CFG_GPI(GPP_C5, NONE, DEEP), -/* UART0_RTS# */ PAD_CFG_GPO(GPP_C10, 1, PLTRST), /* WWAN_FULL_PWR_EN */ +/* UART0_RTS# */ PAD_CFG_GPO(GPP_C10, 1, DEEP), /* WWAN_FULL_PWR_EN */ /* UART0_CTS# */ PAD_NC(GPP_C11, NONE), /* UART1_RXD */ PAD_NC(GPP_C12, NONE), /* UART1_TXD */ PAD_NC(GPP_C13, NONE),