Change in coreboot[master]: soc/intel/xeon_sp/cpx: Workaround FSP-M issues

[Andrey Petrov (Code Review)]

Andrey Petrov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40555 )

Change subject: soc/intel/xeon_sp/cpx: Workaround FSP-M issues
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Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/40555/1/src/soc/intel/xeon_sp/cpx/r... 
File src/soc/intel/xeon_sp/cpx/romstage.c:

https://review.coreboot.org/c/coreboot/+/40555/1/src/soc/intel/xeon_sp/cpx/r... 
PS1, Line 23: 0x70000
> same

I think we should not try to sugar-coat this. 
A hack is still a hack, even if it wrapped with bunch of #defines.

This is an issue that needs to be addressed by Intel. I'd rather this stay as an eye soring reminder that this issue must be fixed