Change in coreboot[master]: soc/intel/skylake: Add SA thermal subsystem definitions to pci_devs.h
Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44027 )
Change subject: soc/intel/skylake: Add SA thermal subsystem definitions to pci_devs.h ......................................................................
soc/intel/skylake: Add SA thermal subsystem definitions to pci_devs.h
Change-Id: Ic83cfbe2a715db317d94c2b9c6cdd8c58a43612f Signed-off-by: Felix Singer felixsinger@posteo.net --- M src/soc/intel/skylake/include/soc/pci_devs.h 1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/44027/1
diff --git a/src/soc/intel/skylake/include/soc/pci_devs.h b/src/soc/intel/skylake/include/soc/pci_devs.h index 60c5f3a..75f1ead 100644 --- a/src/soc/intel/skylake/include/soc/pci_devs.h +++ b/src/soc/intel/skylake/include/soc/pci_devs.h @@ -28,6 +28,10 @@ #define SA_DEVFN_IGD PCI_DEVFN(SA_DEV_SLOT_IGD, 0) #define SA_DEV_IGD PCI_DEV(0, SA_DEV_SLOT_IGD, 0)
+#define SA_DEV_SLOT_TS 0x04 +#define SA_DEVFN_TS PCI_DEVFN(SA_DEV_SLOT_TS, 0) +#define SA_DEV_TS PCI_DEV(0, SA_DEV_SLOT_TS, 0) + #define SA_DEV_SLOT_GMM 0x08 #define SA_DEVFN_GMM PCI_DEVFN(SA_DEV_SLOT_GMM, 0) #define SA_DEV_GMM PCI_DEV(0, SA_DEV_SLOT_GMM, 0)
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44027 )
Change subject: soc/intel/skylake: Add SA thermal subsystem definitions to pci_devs.h ......................................................................
Patch Set 1: Code-Review+2
Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44027 )
Change subject: soc/intel/skylake: Add SA thermal subsystem definitions to pci_devs.h ......................................................................
soc/intel/skylake: Add SA thermal subsystem definitions to pci_devs.h
Change-Id: Ic83cfbe2a715db317d94c2b9c6cdd8c58a43612f Signed-off-by: Felix Singer felixsinger@posteo.net Reviewed-on: https://review.coreboot.org/c/coreboot/+/44027 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Michael Niewöhner --- M src/soc/intel/skylake/include/soc/pci_devs.h 1 file changed, 4 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Michael Niewöhner: Looks good to me, approved
diff --git a/src/soc/intel/skylake/include/soc/pci_devs.h b/src/soc/intel/skylake/include/soc/pci_devs.h index 60c5f3a..75f1ead 100644 --- a/src/soc/intel/skylake/include/soc/pci_devs.h +++ b/src/soc/intel/skylake/include/soc/pci_devs.h @@ -28,6 +28,10 @@ #define SA_DEVFN_IGD PCI_DEVFN(SA_DEV_SLOT_IGD, 0) #define SA_DEV_IGD PCI_DEV(0, SA_DEV_SLOT_IGD, 0)
+#define SA_DEV_SLOT_TS 0x04 +#define SA_DEVFN_TS PCI_DEVFN(SA_DEV_SLOT_TS, 0) +#define SA_DEV_TS PCI_DEV(0, SA_DEV_SLOT_TS, 0) + #define SA_DEV_SLOT_GMM 0x08 #define SA_DEVFN_GMM PCI_DEVFN(SA_DEV_SLOT_GMM, 0) #define SA_DEV_GMM PCI_DEV(0, SA_DEV_SLOT_GMM, 0)
-
Felix Singer (Code Review) -
Michael Niewöhner (Code Review)