HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38308 )
Change subject: include/arch/romstage: Fix typo ......................................................................
include/arch/romstage: Fix typo
Change-Id: Ie0c80792210ded7f81184b60ba2b0b51c13db283 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/arch/x86/include/arch/romstage.h 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/38308/1
diff --git a/src/arch/x86/include/arch/romstage.h b/src/arch/x86/include/arch/romstage.h index 86d4e63..83d15e4 100644 --- a/src/arch/x86/include/arch/romstage.h +++ b/src/arch/x86/include/arch/romstage.h @@ -75,7 +75,7 @@ * tears down CAR and loads ramstage. The postcar_frame object * indicates how to set up the frame. If caching is enabled at * the time of the call it is up to the platform code to handle - * coherency with dirty lines in the cache using some mechansim + * coherency with dirty lines in the cache using some mechanism * such as platform_prog_run() because run_postcar_phase() * utilizes prog_run() internally. */
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38308 )
Change subject: include/arch/romstage: Fix typo ......................................................................
Patch Set 1: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38308 )
Change subject: include/arch/romstage: Fix typo ......................................................................
Patch Set 1: Code-Review+2
Patrick Rudolph has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38308 )
Change subject: include/arch/romstage: Fix typo ......................................................................
include/arch/romstage: Fix typo
Change-Id: Ie0c80792210ded7f81184b60ba2b0b51c13db283 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/38308 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/arch/x86/include/arch/romstage.h 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Kyösti Mälkki: Looks good to me, approved Angel Pons: Looks good to me, approved
diff --git a/src/arch/x86/include/arch/romstage.h b/src/arch/x86/include/arch/romstage.h index 86d4e63..83d15e4 100644 --- a/src/arch/x86/include/arch/romstage.h +++ b/src/arch/x86/include/arch/romstage.h @@ -75,7 +75,7 @@ * tears down CAR and loads ramstage. The postcar_frame object * indicates how to set up the frame. If caching is enabled at * the time of the call it is up to the platform code to handle - * coherency with dirty lines in the cache using some mechansim + * coherency with dirty lines in the cache using some mechanism * such as platform_prog_run() because run_postcar_phase() * utilizes prog_run() internally. */
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38308 )
Change subject: include/arch/romstage: Fix typo ......................................................................
Patch Set 2:
Automatic boot test returned (PASS/FAIL/TOTAL): 3/0/3 Emulation targets: EMULATION_QEMU_X86_Q35 using payload TianoCore : SUCCESS : No test failed. EMULATION_QEMU_X86_Q35 using payload SeaBIOS : SUCCESS : No test failed. EMULATION_QEMU_X86_I440FX using payload SeaBIOS : SUCCESS : No test failed.
Please note: This test is under development and might not be accurate at all!
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9elements QA (Code Review) -
Angel Pons (Code Review)
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HAOUAS Elyes (Code Review)
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Kyösti Mälkki (Code Review)
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Patrick Rudolph (Code Review)