HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38308 )
Change subject: include/arch/romstage: Fix typo ......................................................................
include/arch/romstage: Fix typo
Change-Id: Ie0c80792210ded7f81184b60ba2b0b51c13db283 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/arch/x86/include/arch/romstage.h 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/38308/1
diff --git a/src/arch/x86/include/arch/romstage.h b/src/arch/x86/include/arch/romstage.h index 86d4e63..83d15e4 100644 --- a/src/arch/x86/include/arch/romstage.h +++ b/src/arch/x86/include/arch/romstage.h @@ -75,7 +75,7 @@ * tears down CAR and loads ramstage. The postcar_frame object * indicates how to set up the frame. If caching is enabled at * the time of the call it is up to the platform code to handle - * coherency with dirty lines in the cache using some mechansim + * coherency with dirty lines in the cache using some mechanism * such as platform_prog_run() because run_postcar_phase() * utilizes prog_run() internally. */