Change in coreboot[master]: mb/{ibase/mb899,kontron/986lcd-m}: Use pnp_write_hwm5_index function

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HAOUAS Elyes (Code Review)

8 Oct 2019 8 Oct '19

7:47 p.m.

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35901 )

Change subject: mb/{ibase/mb899,kontron/986lcd-m}: Use pnp_write_hwm5_index function ......................................................................

mb/{ibase/mb899,kontron/986lcd-m}: Use pnp_write_hwm5_index function

Change-Id: If30a17d053da8f0758085fc36469b564d46049cd Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/mainboard/ibase/mb899/superio_hwm.c M src/mainboard/kontron/986lcd-m/mainboard.c 2 files changed, 4 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/35901/1

diff --git a/src/mainboard/ibase/mb899/superio_hwm.c b/src/mainboard/ibase/mb899/superio_hwm.c index 7fb45f9..fd4ac47 100644 --- a/src/mainboard/ibase/mb899/superio_hwm.c +++ b/src/mainboard/ibase/mb899/superio_hwm.c @@ -19,6 +19,7 @@ #include <console/console.h> #include <device/device.h> #include <pc80/mc146818rtc.h> +#include <superio/hwm5_conf.h>

#include "superio_hwm.h"

@@ -35,8 +36,7 @@

static void hwm_write(u8 reg, u8 value) { - outb(reg, HWM_BASE + 0x05); - outb(value, HWM_BASE + 0x06); + pnp_write_hwm5_index(HWM_BASE, reg, value) }

static void hwm_bank(u8 bank) diff --git a/src/mainboard/kontron/986lcd-m/mainboard.c b/src/mainboard/kontron/986lcd-m/mainboard.c index 85b704e..ed175c4 100644 --- a/src/mainboard/kontron/986lcd-m/mainboard.c +++ b/src/mainboard/kontron/986lcd-m/mainboard.c @@ -21,6 +21,7 @@ #include <drivers/intel/gma/int15.h> #include <pc80/mc146818rtc.h> #include <arch/io.h> +#include <superio/hwm5_conf.h>

/* Hardware Monitor */

@@ -28,8 +29,7 @@

static void hwm_write(u8 reg, u8 value) { - outb(reg, hwm_base + 0x05); - outb(value, hwm_base + 0x06); + pnp_write_hwm5_index(hwm_base, reg, value) }

static void hwm_bank(u8 bank)

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HAOUAS Elyes (Code Review)

8 Oct 8 Oct

7:50 p.m.

Hello Felix Held,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/35901

to look at the new patch set (#2).

Change subject: mb/{ibase/mb899,kontron/986lcd-m}: Use pnp_write_hwm5_index function ......................................................................

mb/{ibase/mb899,kontron/986lcd-m}: Use pnp_write_hwm5_index function

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/35901/2

Felix Held (Code Review)

9 Oct 9 Oct

10:55 a.m.

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35901 )

Change subject: mb/{ibase/mb899,kontron/986lcd-m}: Use pnp_write_hwm5_index function ......................................................................

Patch Set 2: Code-Review+2

Would replacing all hwm_write calls with pnp_write_hwm5_index calls instead of hwm_write calling pnp_write_hwm5_index be a good idea here? Or mark hwm_write as inline?

-- To view, visit https://review.coreboot.org/c/coreboot/+/35901 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If30a17d053da8f0758085fc36469b564d46049cd Gerrit-Change-Number: 35901 Gerrit-PatchSet: 2 Gerrit-Owner: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de Gerrit-Reviewer: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Wed, 09 Oct 2019 10:55:46 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

HAOUAS Elyes (Code Review)

2:47 p.m.

Hello Felix Held, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/35901

to look at the new patch set (#3).

Change subject: mb/{ibase/mb899,kontron/986lcd-m}: Use pnp_write_hwm5_index function ......................................................................

mb/{ibase/mb899,kontron/986lcd-m}: Use pnp_write_hwm5_index function

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/35901/3

-- To view, visit https://review.coreboot.org/c/coreboot/+/35901 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If30a17d053da8f0758085fc36469b564d46049cd Gerrit-Change-Number: 35901 Gerrit-PatchSet: 3 Gerrit-Owner: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de Gerrit-Reviewer: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-MessageType: newpatchset

build bot (Jenkins) (Code Review)

2:48 p.m.

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35901 )

Change subject: mb/{ibase/mb899,kontron/986lcd-m}: Use pnp_write_hwm5_index function ......................................................................

Patch Set 3:

(4 comments)

https://review.coreboot.org/c/coreboot/+/35901/3/src/mainboard/ibase/mb899/s... File src/mainboard/ibase/mb899/superio_hwm.c:

https://review.coreboot.org/c/coreboot/+/35901/3/src/mainboard/ibase/mb899/s... PS3, Line 122: pnp_write_hwm5_index(HWM_BASE, 0x06, temperatures[cpufan_temperature].deg_celsius); line over 96 characters

https://review.coreboot.org/c/coreboot/+/35901/3/src/mainboard/ibase/mb899/s... PS3, Line 136: pnp_write_hwm5_index(HWM_BASE, 0x05, temperatures[sysfan_temperature].deg_celsius); line over 96 characters

https://review.coreboot.org/c/coreboot/+/35901/3/src/mainboard/kontron/986lc... File src/mainboard/kontron/986lcd-m/mainboard.c:

https://review.coreboot.org/c/coreboot/+/35901/3/src/mainboard/kontron/986lc... PS3, Line 115: pnp_write_hwm5_index(hwm_base, 0x06, temperatures[cpufan_temperature].deg_celsius); line over 96 characters

https://review.coreboot.org/c/coreboot/+/35901/3/src/mainboard/kontron/986lc... PS3, Line 129: pnp_write_hwm5_index(hwm_base, 0x05, temperatures[sysfan_temperature].deg_celsius); line over 96 characters

-- To view, visit https://review.coreboot.org/c/coreboot/+/35901 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If30a17d053da8f0758085fc36469b564d46049cd Gerrit-Change-Number: 35901 Gerrit-PatchSet: 3 Gerrit-Owner: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de Gerrit-Reviewer: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Wed, 09 Oct 2019 14:48:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

Felix Held (Code Review)

6:17 p.m.

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35901 )

Change subject: mb/{ibase/mb899,kontron/986lcd-m}: Use pnp_write_hwm5_index function ......................................................................

Patch Set 3: Code-Review+1

(1 comment)

https://review.coreboot.org/c/coreboot/+/35901/3/src/mainboard/ibase/mb899/s... File src/mainboard/ibase/mb899/superio_hwm.c:

https://review.coreboot.org/c/coreboot/+/35901/3/src/mainboard/ibase/mb899/s... PS3, Line 122: please add a line break here and indent the rest of the line with one tab beyond the beginning of this line like I did in some places in this patch https://review.coreboot.org/c/coreboot/+/35858/2/src/superio/ite/common/env_... same for the other 3 places where jenkins complained

-- To view, visit https://review.coreboot.org/c/coreboot/+/35901 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If30a17d053da8f0758085fc36469b564d46049cd Gerrit-Change-Number: 35901 Gerrit-PatchSet: 3 Gerrit-Owner: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de Gerrit-Reviewer: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Wed, 09 Oct 2019 18:17:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

HAOUAS Elyes (Code Review)

7:26 p.m.

Hello Felix Held, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/35901

to look at the new patch set (#4).

Change subject: mb/{ibase/mb899,kontron/986lcd-m}: Use pnp_write_hwm5_index function ......................................................................

mb/{ibase/mb899,kontron/986lcd-m}: Use pnp_write_hwm5_index function

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/35901/4

-- To view, visit https://review.coreboot.org/c/coreboot/+/35901 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If30a17d053da8f0758085fc36469b564d46049cd Gerrit-Change-Number: 35901 Gerrit-PatchSet: 4 Gerrit-Owner: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de Gerrit-Reviewer: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-MessageType: newpatchset

Felix Held (Code Review)

7:36 p.m.

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35901 )

Change subject: mb/{ibase/mb899,kontron/986lcd-m}: Use pnp_write_hwm5_index function ......................................................................

Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/35901/3/src/mainboard/ibase/mb899/s... File src/mainboard/ibase/mb899/superio_hwm.c:

https://review.coreboot.org/c/coreboot/+/35901/3/src/mainboard/ibase/mb899/s... PS3, Line 122:

...

please add a line break here and indent the rest of the line with one tab beyond the beginning of th […]

Done

-- To view, visit https://review.coreboot.org/c/coreboot/+/35901 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If30a17d053da8f0758085fc36469b564d46049cd Gerrit-Change-Number: 35901 Gerrit-PatchSet: 4 Gerrit-Owner: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de Gerrit-Reviewer: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Wed, 09 Oct 2019 19:36:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held felix-coreboot@felixheld.de Gerrit-MessageType: comment

Felix Held (Code Review)

7:36 p.m.

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35901 )

Change subject: mb/{ibase/mb899,kontron/986lcd-m}: Use pnp_write_hwm5_index function ......................................................................

Patch Set 4: Code-Review+2

-- To view, visit https://review.coreboot.org/c/coreboot/+/35901 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If30a17d053da8f0758085fc36469b564d46049cd Gerrit-Change-Number: 35901 Gerrit-PatchSet: 4 Gerrit-Owner: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de Gerrit-Reviewer: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Wed, 09 Oct 2019 19:36:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Felix Held (Code Review)

10 Oct 10 Oct

1:52 p.m.

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35901 )

Change subject: mb/{ibase/mb899,kontron/986lcd-m}: Use pnp_write_hwm5_index function ......................................................................

mb/{ibase/mb899,kontron/986lcd-m}: Use pnp_write_hwm5_index function

Change-Id: If30a17d053da8f0758085fc36469b564d46049cd Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/35901 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Felix Held felix-coreboot@felixheld.de --- M src/mainboard/ibase/mb899/superio_hwm.c M src/mainboard/kontron/986lcd-m/mainboard.c 2 files changed, 52 insertions(+), 68 deletions(-)

Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved

diff --git a/src/mainboard/ibase/mb899/superio_hwm.c b/src/mainboard/ibase/mb899/superio_hwm.c index 7fb45f9..a7f6acf 100644 --- a/src/mainboard/ibase/mb899/superio_hwm.c +++ b/src/mainboard/ibase/mb899/superio_hwm.c @@ -19,6 +19,7 @@ #include <console/console.h> #include <device/device.h> #include <pc80/mc146818rtc.h> +#include <superio/hwm5_conf.h>

#include "superio_hwm.h"

@@ -33,17 +34,6 @@

#define HWM_BASE 0x290

-static void hwm_write(u8 reg, u8 value) -{ - outb(reg, HWM_BASE + 0x05); - outb(value, HWM_BASE + 0x06); -} - -static void hwm_bank(u8 bank) -{ - hwm_write(0x4e, bank); -} - struct fan_speed { u8 fan_in; u16 fan_speed; @@ -90,19 +80,19 @@ //sysfan_temperature = FAN_TEMPERATURE_30DEGC; //get_option(&sysfan_temperature, "sysfan_temperature");

- // hwm_write(0x31, 0x20); // AVCC high limit - // hwm_write(0x34, 0x06); // VIN2 low limit + // pnp_write_hwm5_index(HWM_BASE, 0x31, 0x20); // AVCC high limit + // pnp_write_hwm5_index(HWM_BASE, 0x34, 0x06); // VIN2 low limit

- hwm_bank(0); - hwm_write(0x59, 0x20); // Diode Selection - hwm_write(0x5d, 0x0f); // All Sensors Diode, not Thermistor + pnp_write_hwm5_index(HWM_BASE, 0x4e, 0); + pnp_write_hwm5_index(HWM_BASE, 0x59, 0x20); // Diode Selection + pnp_write_hwm5_index(HWM_BASE, 0x5d, 0x0f); // All Sensors Diode, not Thermistor

- hwm_bank(4); - hwm_write(0x54, 0xf1); // SYSTIN temperature offset - hwm_write(0x55, 0x19); // CPUTIN temperature offset - hwm_write(0x56, 0xfc); // AUXTIN temperature offset + pnp_write_hwm5_index(HWM_BASE, 0x4e, 4); + pnp_write_hwm5_index(HWM_BASE, 0x54, 0xf1); // SYSTIN temperature offset + pnp_write_hwm5_index(HWM_BASE, 0x55, 0x19); // CPUTIN temperature offset + pnp_write_hwm5_index(HWM_BASE, 0x56, 0xfc); // AUXTIN temperature offset

- hwm_bank(0x80); // Default + pnp_write_hwm5_index(HWM_BASE, 0x4e, 0x80); // Default

u8 fan_config = 0; // 00 FANOUT is Manual Mode @@ -117,41 +107,43 @@ case FAN_CRUISE_CONTROL_THERMAL: fan_config |= (1 << 2); break; } // This register must be written first - hwm_write(0x04, fan_config); + pnp_write_hwm5_index(HWM_BASE, 0x04, fan_config);

switch (cpufan_control) { - case FAN_CRUISE_CONTROL_SPEED: + case FAN_CRUISE_CONTROL_SPEED: /* CPUFANIN target speed */ printk(BIOS_DEBUG, "Fan Cruise Control setting CPU fan to %d RPM\n", fan_speeds[cpufan_speed].fan_speed); - hwm_write(0x06, fan_speeds[cpufan_speed].fan_in); // CPUFANIN target speed + pnp_write_hwm5_index(HWM_BASE, 0x06, fan_speeds[cpufan_speed].fan_in); break; - case FAN_CRUISE_CONTROL_THERMAL: + case FAN_CRUISE_CONTROL_THERMAL: /* CPUFANIN target temperature */ printk(BIOS_DEBUG, "Fan Cruise Control setting CPU fan to activation at %d deg C/%d deg F\n", temperatures[cpufan_temperature].deg_celsius, temperatures[cpufan_temperature].deg_fahrenheit); - hwm_write(0x06, temperatures[cpufan_temperature].deg_celsius); // CPUFANIN target temperature + pnp_write_hwm5_index(HWM_BASE, 0x06, + temperatures[cpufan_temperature].deg_celsius); break; }

switch (sysfan_control) { - case FAN_CRUISE_CONTROL_SPEED: + case FAN_CRUISE_CONTROL_SPEED: /* SYSFANIN target speed */ printk(BIOS_DEBUG, "Fan Cruise Control setting system fan to %d RPM\n", fan_speeds[sysfan_speed].fan_speed); - hwm_write(0x05, fan_speeds[sysfan_speed].fan_in); // SYSFANIN target speed + pnp_write_hwm5_index(HWM_BASE, 0x05, fan_speeds[sysfan_speed].fan_in); break; - case FAN_CRUISE_CONTROL_THERMAL: + case FAN_CRUISE_CONTROL_THERMAL: /* SYSFANIN target temperature */ printk(BIOS_DEBUG, "Fan Cruise Control setting system fan to activation at %d deg C/%d deg F\n", temperatures[sysfan_temperature].deg_celsius, temperatures[sysfan_temperature].deg_fahrenheit); - hwm_write(0x05, temperatures[sysfan_temperature].deg_celsius); // SYSFANIN target temperature + pnp_write_hwm5_index(HWM_BASE, + 0x05, temperatures[sysfan_temperature].deg_celsius); break; }

- hwm_write(0x0e, 0x02); // Fan Output Step Down Time - hwm_write(0x0f, 0x02); // Fan Output Step Up Time + pnp_write_hwm5_index(HWM_BASE, 0x0e, 0x02); // Fan Output Step Down Time + pnp_write_hwm5_index(HWM_BASE, 0x0f, 0x02); // Fan Output Step Up Time

- hwm_write(0x47, 0xaf); // FAN divisor register - hwm_write(0x4b, 0x84); // AUXFANIN speed divisor + pnp_write_hwm5_index(HWM_BASE, 0x47, 0xaf); // FAN divisor register + pnp_write_hwm5_index(HWM_BASE, 0x4b, 0x84); // AUXFANIN speed divisor

- hwm_write(0x40, 0x01); // Init, but no SMI# + pnp_write_hwm5_index(HWM_BASE, 0x40, 0x01); // Init, but no SMI# } diff --git a/src/mainboard/kontron/986lcd-m/mainboard.c b/src/mainboard/kontron/986lcd-m/mainboard.c index 85b704e..509e8945 100644 --- a/src/mainboard/kontron/986lcd-m/mainboard.c +++ b/src/mainboard/kontron/986lcd-m/mainboard.c @@ -21,22 +21,12 @@ #include <drivers/intel/gma/int15.h> #include <pc80/mc146818rtc.h> #include <arch/io.h> +#include <superio/hwm5_conf.h>

/* Hardware Monitor */

static u16 hwm_base = 0xa00;

-static void hwm_write(u8 reg, u8 value) -{ - outb(reg, hwm_base + 0x05); - outb(value, hwm_base + 0x06); -} - -static void hwm_bank(u8 bank) -{ - hwm_write(0x4e, bank); -} - #define FAN_CRUISE_CONTROL_DISABLED 0 #define FAN_CRUISE_CONTROL_SPEED 1 #define FAN_CRUISE_CONTROL_THERMAL 2 @@ -86,16 +76,16 @@ sysfan_speed = FAN_SPEED_5625; get_option(&sysfan_speed, "sysfan_speed");

- hwm_bank(0); - hwm_write(0x59, 0x20); /* Diode Selection */ - hwm_write(0x5d, 0x0f); /* All Sensors Diode, not Thermistor */ + pnp_write_hwm5_index(hwm_base, 0x4e, 0); + pnp_write_hwm5_index(hwm_base, 0x59, 0x20); /* Diode Selection */ + pnp_write_hwm5_index(hwm_base, 0x5d, 0x0f); /* All Sensors Diode, not Thermistor */

- hwm_bank(4); - hwm_write(0x54, 0xf1); /* SYSTIN temperature offset */ - hwm_write(0x55, 0x19); /* CPUTIN temperature offset */ - hwm_write(0x56, 0xfc); /* AUXTIN temperature offset */ + pnp_write_hwm5_index(hwm_base, 0x4e, 4); + pnp_write_hwm5_index(hwm_base, 0x54, 0xf1); /* SYSTIN temperature offset */ + pnp_write_hwm5_index(hwm_base, 0x55, 0x19); /* CPUTIN temperature offset */ + pnp_write_hwm5_index(hwm_base, 0x56, 0xfc); /* AUXTIN temperature offset */

- hwm_bank(0x80); /* Default */ + pnp_write_hwm5_index(hwm_base, 0x4e, 0x80); /* Default */

u8 fan_config = 0; /* 00 FANOUT is Manual Mode */ @@ -110,43 +100,45 @@ case FAN_CRUISE_CONTROL_THERMAL: fan_config |= (1 << 2); break; } /* This register must be written first */ - hwm_write(0x04, fan_config); + pnp_write_hwm5_index(hwm_base, 0x04, fan_config);

switch (cpufan_control) { - case FAN_CRUISE_CONTROL_SPEED: + case FAN_CRUISE_CONTROL_SPEED: /* CPUFANIN target speed */ printk(BIOS_DEBUG, "Fan Cruise Control setting CPU fan to %d RPM\n", fan_speeds[cpufan_speed].fan_speed); - hwm_write(0x06, fan_speeds[cpufan_speed].fan_in); /* CPUFANIN target speed */ + pnp_write_hwm5_index(hwm_base, 0x06, fan_speeds[cpufan_speed].fan_in); break; - case FAN_CRUISE_CONTROL_THERMAL: + case FAN_CRUISE_CONTROL_THERMAL: /* CPUFANIN target temperature */ printk(BIOS_DEBUG, "Fan Cruise Control setting CPU fan to activation at %d deg C/%d deg F\n", temperatures[cpufan_temperature].deg_celsius, temperatures[cpufan_temperature].deg_fahrenheit); - hwm_write(0x06, temperatures[cpufan_temperature].deg_celsius); /* CPUFANIN target temperature */ + pnp_write_hwm5_index(hwm_base, 0x06, + temperatures[cpufan_temperature].deg_celsius); break; }

switch (sysfan_control) { - case FAN_CRUISE_CONTROL_SPEED: + case FAN_CRUISE_CONTROL_SPEED: /* SYSFANIN target speed */ printk(BIOS_DEBUG, "Fan Cruise Control setting system fan to %d RPM\n", fan_speeds[sysfan_speed].fan_speed); - hwm_write(0x05, fan_speeds[sysfan_speed].fan_in); /* SYSFANIN target speed */ + pnp_write_hwm5_index(hwm_base, 0x05, fan_speeds[sysfan_speed].fan_in); break; - case FAN_CRUISE_CONTROL_THERMAL: + case FAN_CRUISE_CONTROL_THERMAL: /* SYSFANIN target temperature */ printk(BIOS_DEBUG, "Fan Cruise Control setting system fan to activation at %d deg C/%d deg F\n", temperatures[sysfan_temperature].deg_celsius, temperatures[sysfan_temperature].deg_fahrenheit); - hwm_write(0x05, temperatures[sysfan_temperature].deg_celsius); /* SYSFANIN target temperature */ + pnp_write_hwm5_index(hwm_base, 0x05, + temperatures[sysfan_temperature].deg_celsius); break; }

- hwm_write(0x0e, 0x02); /* Fan Output Step Down Time */ - hwm_write(0x0f, 0x02); /* Fan Output Step Up Time */ + pnp_write_hwm5_index(hwm_base, 0x0e, 0x02); /* Fan Output Step Down Time */ + pnp_write_hwm5_index(hwm_base, 0x0f, 0x02); /* Fan Output Step Up Time */

- hwm_write(0x47, 0xaf); /* FAN divisor register */ - hwm_write(0x4b, 0x84); /* AUXFANIN speed divisor */ + pnp_write_hwm5_index(hwm_base, 0x47, 0xaf); /* FAN divisor register */ + pnp_write_hwm5_index(hwm_base, 0x4b, 0x84); /* AUXFANIN speed divisor */

- hwm_write(0x40, 0x01); /* Init, but no SMI# */ + pnp_write_hwm5_index(hwm_base, 0x40, 0x01); /* Init, but no SMI# */ }

/* mainboard_enable is executed as first thing after */

-- To view, visit https://review.coreboot.org/c/coreboot/+/35901 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If30a17d053da8f0758085fc36469b564d46049cd Gerrit-Change-Number: 35901 Gerrit-PatchSet: 5 Gerrit-Owner: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de Gerrit-Reviewer: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-MessageType: merged

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build bot (Jenkins) (Code Review)
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