Change in coreboot[master]: mb/clevo/tgl-u: Add Clevo NV4x Tiger Lake laptop support

[Michał Kopeć (Code Review)]

Attention is currently required from: Felix Singer, Michał Żygowski, Angel Pons, Michael Niewöhner.
Michał Kopeć has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62498 )

Change subject: mb/clevo/tgl-u: Add Clevo NV4x Tiger Lake laptop support
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Patch Set 14:

(1 comment)

File src/mainboard/clevo/tgl-u/variants/baseboard/devicetree.cb:

https://review.coreboot.org/c/coreboot/+/62498/comment/801dd708_e173b652 
PS1, Line 58: 	register "LpmStateDisableMask" = "
            : 		LPM_S0i2_1 |
            : 		LPM_S0i2_2 |
            : 		LPM_S0i3_1 |
            : 		LPM_S0i3_2 |
            : 		LPM_S0i3_3 |
            : 		LPM_S0i3_4
            :
> -> see Michal's and my discussion in matrix ;) Intel docs don't state any specific requirements, so  […]

Understood. With the `LpmStateDisableMask` removed, s0i2.0 and s0i2.1 are enabled. Unfortunately the board doesn't reach s0i2.1 due to some IPs not turning off, but it seems to be stable otherwise