[XL] Change in coreboot[main]: soc/intel/ptl: Add SoC ACPI directory for Panther Lake

[Cliff Huang (Code Review)]

Attention is currently required from: Anil Kumar K, Bora Guvendik, Hannah Williams, Jamie Ryu, Jérémy Compostella, Kapil Porwal, Paul Menzel, Pranava Y N, Ravishankar Sarawadi, Saurabh Mishra, Subrata Banik, Wonkyu Kim.

Cliff Huang has posted comments on this change by Ravishankar Sarawadi. ( https://review.coreboot.org/c/coreboot/+/83772?usp=email )

Change subject: soc/intel/ptl: Add SoC ACPI directory for Panther Lake
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Patch Set 125:

(13 comments)

File src/soc/intel/pantherlake/acpi/camera_clock_ctl.asl:

https://review.coreboot.org/c/coreboot/+/83772/comment/bd8c7d55_cdbca84f?usp... :
PS125, Line 4: #define B_ICLK_PCR_FREQUENCY	0x1
> Please add a TODO for pending ICLK register details in EDS and/or equivalent

This is covered by task 17 IMGCLKOUT[n]: https://partnerissuetracker.corp.google.com/issues/357011633#comment23

File src/soc/intel/pantherlake/acpi/tcss.asl:

https://review.coreboot.org/c/coreboot/+/83772/comment/5f84732a_3b9509a4?usp... :
PS125, Line 405: 		,     2,
> why we need this ?

removed.

https://review.coreboot.org/c/coreboot/+/83772/comment/fd73e459_bdc822b4?usp... :
PS125, Line 608: 		/*
               : 		 * FIXME: Remove this workaround after resolving b/244082753
               : 		 *
               : 		 * Document #742990: TCCold exit flow may not complete when processor at package
               : 		 * C0. The implication is that the system may hang.
               : 		 */
> remove stale comments

Done

File src/soc/intel/pantherlake/acpi/tcss_pcierp.asl:

https://review.coreboot.org/c/coreboot/+/83772/comment/e5945254_a4ea7008?usp... :
PS125, Line 39: LNRE,   1,
> please add a description for this bit-field

Done

https://review.coreboot.org/c/coreboot/+/83772/comment/227bc1e0_6a736a75?usp... :
PS125, Line 43: 	LSOE,   1,
              : 	LNSE,   1,
> same

This is covered by task 17 for the register info https://partnerissuetracker.corp.google.com/issues/357011633#comment25

https://review.coreboot.org/c/coreboot/+/83772/comment/125cc9cd_22082276?usp... :
PS125, Line 49: 0x5BC
> 0x5bc

Done

https://review.coreboot.org/c/coreboot/+/83772/comment/d6bf07a9_be99ecb1?usp... :
PS125, Line 53: 0xBA8
> in smaller case

Done

https://review.coreboot.org/c/coreboot/+/83772/comment/a8df05da_b292d2d1?usp... :
PS125, Line 57: 0xBB2
> same

Done

https://review.coreboot.org/c/coreboot/+/83772/comment/8675cc1e_11bd5d75?usp... :
PS125, Line 65: 0xDC
> same

this is not correct value. also change the for the macros to use lower cases.

https://review.coreboot.org/c/coreboot/+/83772/comment/5773b37e_c94d4018?usp... :
PS125, Line 212: 	}
> please allow one empty line between 212 and 213

Done

File src/soc/intel/pantherlake/acpi/tcss_xhci.asl:

https://review.coreboot.org/c/coreboot/+/83772/comment/8a182540_cbfd79a0?usp... :
PS125, Line 37: 	/* D3COLD_SUPPORT */
> nit: […]

Done

https://review.coreboot.org/c/coreboot/+/83772/comment/f797575c_0c44d7ca?usp... :
PS125, Line 56: 	// D3COLD_SUPPORT
> same

Done

File src/soc/intel/pantherlake/acpi/xhci.asl:

https://review.coreboot.org/c/coreboot/+/83772/comment/d0e4cda9_364b9a91?usp... :
PS125, Line 29: Pantherlake
> please remove this entire line, we are inside PTL soc

Done