Josie Nordrum has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44157 )
Change subject: mb/google/zork: SW changes for HP_INT_ODL in schematic v3.6 ......................................................................
mb/google/zork: SW changes for HP_INT_ODL in schematic v3.6
HP_INT_ODL is no longer connected to CODEC_GPI in schematic version 3.6.
Split variant_audio_update into update_dmic_gpio and update_hp_int_odl. Changed GPIO_29 from PAD_NC to PAD_GPI in Trembyle. Changed GPIO_84 from PAD_NC to PAD_GPI for Dalboz. Changed HP_INT_ODL to appropriate pin in both boards devicetree.cb.
BUG=b:161938476 BRANCH=None TEST=None
Cq-Depend: chromium:2335424 Change-Id: I05ffb063ab99823d07be6eaa911efbde3cc4ff55 Signed-off-by: Josie Nordrum josienordrum@google.com --- M src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c M src/mainboard/google/zork/variants/baseboard/ramstage_common.c 5 files changed, 56 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/44157/1
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb index 9b40ca0..c60373b 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb @@ -308,7 +308,7 @@ register "name" = ""RT58"" register "uid" = "1" register "desc" = ""Realtek RT5682"" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(62)" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPIO_84)" register "property_count" = "2" register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" register "property_list[0].name" = ""realtek,jd-src"" diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb index 1b43cc8..6d26179 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb @@ -333,7 +333,7 @@ register "name" = ""RT58"" register "uid" = "1" register "desc" = ""Realtek RT5682"" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(62)" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPIO_29)" register "property_count" = "2" register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" register "property_list[0].name" = ""realtek,jd-src"" diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c index 5568194..62ecaf5 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c @@ -93,8 +93,8 @@ /* EN_PWR_CAMERA */ PAD_GPO(GPIO_76, HIGH), /* GPIO_77 - GPIO_83: Not available */ - /* UNUSED */ - PAD_NC(GPIO_84), + /* HP_INT_ODL */ + PAD_GPI(GPIO_84), /* APU_EDP_BL_DISABLE TODP: Set low in depthcharge */ PAD_GPO(GPIO_85, HIGH), /* RAM ID 2 */ diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c index c10c9f4..c374cff 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c @@ -66,7 +66,7 @@ PAD_NC(GPIO_27), /* GPIO_28: Not available */ /* GPIO_29: unused */ - PAD_NC(GPIO_29), + PAD_GPI(GPIO_29), /* FCH_ESPI_EC_CS_L */ PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE), /* EC_AP_INT_ODL (Sensor Framesync) */ diff --git a/src/mainboard/google/zork/variants/baseboard/ramstage_common.c b/src/mainboard/google/zork/variants/baseboard/ramstage_common.c index b2c5830..e4c9869 100644 --- a/src/mainboard/google/zork/variants/baseboard/ramstage_common.c +++ b/src/mainboard/google/zork/variants/baseboard/ramstage_common.c @@ -11,6 +11,55 @@ #include <soc/pci_devs.h>
extern struct chip_operations drivers_amd_i2s_machine_dev_ops; +extern struct chip_operations drivers_i2c_generic_ops; + +static const struct device_path rt5682_path[] = { + { + .type = DEVICE_PATH_PCI, + .pci.devfn = LPC_DEVFN + }, + { + .type = DEVICE_PATH_PNP, + .pnp.port = 0xc09, + .pnp.device = 0x0 + }, + { + .type = DEVICE_PATH_GENERIC, + .generic.id = 0, + .generic.subid = 0 + }, + { + .type = DEVICE_PATH_I2C, + .i2c.device = 0x1a + } +}; + +void update_hp_int_odl(void) +{ + const struct device *rt5682_dev; + struct drivers_i2c_generic_config *cfg; + struct acpi_gpio *gpio; + + if (!variant_uses_codec_gpi()) + return; + + rt5682_dev = find_dev_nested_path( + pci_root_bus(), rt5682_path, ARRAY_SIZE(rt5682_path)); + if (!rt5682_dev) { + printk(BIOS_ERR, "%s: Failed to find audio device\n", __func__); + return; + } + + if (rt5682_dev->chip_ops != &drivers_i2c_generic_ops) { + printk(BIOS_ERR, "%s: Incorrect device found\n", __func__); + return; + } + + cfg = config_of(rt5682_dev); + gpio = &cfg->irq_gpio; + gpio->pins[0] = GPIO_62; + +}
void variant_audio_update(void) { @@ -49,6 +98,8 @@
break; } + + update_hp_int_odl(); }
static const struct device_path xhci0_bt_path[] = {
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44157 )
Change subject: mb/google/zork: SW changes for HP_INT_ODL in schematic v3.6 ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/44157/1/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/baseboard/ramstage_common.c:
https://review.coreboot.org/c/coreboot/+/44157/1/src/mainboard/google/zork/v... PS1, Line 16: rt5682_path This can be moved to live within update_hp_int_odl() since it is not required outside that function.
https://review.coreboot.org/c/coreboot/+/44157/1/src/mainboard/google/zork/v... PS1, Line 37: void static void
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44157 )
Change subject: mb/google/zork: SW changes for HP_INT_ODL in schematic v3.6 ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44157/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44157/1//COMMIT_MSG@7 PS1, Line 7: mb/google/zork: SW changes for HP_INT_ODL in schematic v3.6 Please make it a statement by adding a verb (in imperative mood).
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44157 )
Change subject: mb/google/zork: SW changes for HP_INT_ODL in schematic v3.6 ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/44157/1/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c:
https://review.coreboot.org/c/coreboot/+/44157/1/src/mainboard/google/zork/v... PS1, Line 97: PAD_GPI(GPIO_84), Just realized that this will have to be: PAD_GPI(GPIO_84, PULL_NONE)
i.e. PAD_GPI takes 2 arguments.
https://review.coreboot.org/c/coreboot/+/44157/1/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c:
https://review.coreboot.org/c/coreboot/+/44157/1/src/mainboard/google/zork/v... PS1, Line 69: PAD_GPI(GPIO_29), Same here: PAD_GPI(GPIO_29, PULL_NONE),
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44157 )
Change subject: mb/google/zork: SW changes for HP_INT_ODL in schematic v3.6 ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44157/1/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c:
https://review.coreboot.org/c/coreboot/+/44157/1/src/mainboard/google/zork/v... PS1, Line 68: unused Comment needs update too.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44157 )
Change subject: mb/google/zork: SW changes for HP_INT_ODL in schematic v3.6 ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/44157/1/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/baseboard/ramstage_common.c:
https://review.coreboot.org/c/coreboot/+/44157/1/src/mainboard/google/zork/v... PS1, Line 7: #include <drivers/amd/i2s_machine_dev/chip.h> You will also need #include <drivers/i2c/generic/chip.h> for struct drivers_i2c_generic_config.
https://review.coreboot.org/c/coreboot/+/44157/1/src/mainboard/google/zork/v... PS1, Line 60: GPIO_62 Looks like GPIO_62 macro is not provided by SoC (probably because it is not a pad that can be configured as a normal GPIO). You might have to use 62 instead of GPIO_62 here.
Hello build bot (Jenkins), Raul Rangel, Furquan Shaikh, Rob Barnes, Aaron Durbin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44157
to look at the new patch set (#2).
Change subject: mb/google/zork: Make SW changes for HP_INT_ODL in schematic v3.6 ......................................................................
mb/google/zork: Make SW changes for HP_INT_ODL in schematic v3.6
HP_INT_ODL is no longer connected to CODEC_GPI in schematic version 3.6.
Split variant_audio_update into update_dmic_gpio and update_hp_int_odl. Changed GPIO_29 from PAD_NC to PAD_GPI in Trembyle. Changed GPIO_84 from PAD_NC to PAD_GPI for Dalboz. Changed HP_INT_ODL to appropriate pin in both boards devicetree.cb.
BUG=b:161938476 BRANCH=None TEST=None
Cq-Depend: chromium:2335424 Change-Id: I05ffb063ab99823d07be6eaa911efbde3cc4ff55 Signed-off-by: Josie Nordrum josienordrum@google.com --- M src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c M src/mainboard/google/zork/variants/baseboard/ramstage_common.c 5 files changed, 61 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/44157/2
Josie Nordrum has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44157 )
Change subject: mb/google/zork: Make SW changes for HP_INT_ODL in schematic v3.6 ......................................................................
Patch Set 3:
(7 comments)
https://review.coreboot.org/c/coreboot/+/44157/1/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c:
https://review.coreboot.org/c/coreboot/+/44157/1/src/mainboard/google/zork/v... PS1, Line 97: PAD_GPI(GPIO_84),
Just realized that this will have to be: PAD_GPI(GPIO_84, PULL_NONE) […]
Done
https://review.coreboot.org/c/coreboot/+/44157/1/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c:
https://review.coreboot.org/c/coreboot/+/44157/1/src/mainboard/google/zork/v... PS1, Line 68: unused
Comment needs update too.
Done
https://review.coreboot.org/c/coreboot/+/44157/1/src/mainboard/google/zork/v... PS1, Line 69: PAD_GPI(GPIO_29),
Same here: PAD_GPI(GPIO_29, PULL_NONE),
Done
https://review.coreboot.org/c/coreboot/+/44157/1/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/baseboard/ramstage_common.c:
https://review.coreboot.org/c/coreboot/+/44157/1/src/mainboard/google/zork/v... PS1, Line 7: #include <drivers/amd/i2s_machine_dev/chip.h>
You will also need #include <drivers/i2c/generic/chip.h> for struct drivers_i2c_generic_config.
Done
https://review.coreboot.org/c/coreboot/+/44157/1/src/mainboard/google/zork/v... PS1, Line 16: rt5682_path
This can be moved to live within update_hp_int_odl() since it is not required outside that function.
Done
https://review.coreboot.org/c/coreboot/+/44157/1/src/mainboard/google/zork/v... PS1, Line 37: void
static void
Done
https://review.coreboot.org/c/coreboot/+/44157/1/src/mainboard/google/zork/v... PS1, Line 60: GPIO_62
Looks like GPIO_62 macro is not provided by SoC (probably because it is not a pad that can be config […]
Done
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44157 )
Change subject: mb/google/zork: Make SW changes for HP_INT_ODL in schematic v3.6 ......................................................................
Patch Set 3: Code-Review+2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44157 )
Change subject: mb/google/zork: Make SW changes for HP_INT_ODL in schematic v3.6 ......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44157/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44157/1//COMMIT_MSG@7 PS1, Line 7: mb/google/zork: SW changes for HP_INT_ODL in schematic v3.6
Please make it a statement by adding a verb (in imperative mood).
Done
Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44157 )
Change subject: mb/google/zork: Make SW changes for HP_INT_ODL in schematic v3.6 ......................................................................
mb/google/zork: Make SW changes for HP_INT_ODL in schematic v3.6
HP_INT_ODL is no longer connected to CODEC_GPI in schematic version 3.6.
Split variant_audio_update into update_dmic_gpio and update_hp_int_odl. Changed GPIO_29 from PAD_NC to PAD_GPI in Trembyle. Changed GPIO_84 from PAD_NC to PAD_GPI for Dalboz. Changed HP_INT_ODL to appropriate pin in both boards devicetree.cb.
BUG=b:161938476 BRANCH=None TEST=None
Cq-Depend: chromium:2335424 Change-Id: I05ffb063ab99823d07be6eaa911efbde3cc4ff55 Signed-off-by: Josie Nordrum josienordrum@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/44157 Reviewed-by: Furquan Shaikh furquan@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c M src/mainboard/google/zork/variants/baseboard/ramstage_common.c 5 files changed, 61 insertions(+), 6 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb index 9b40ca0..c60373b 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb @@ -308,7 +308,7 @@ register "name" = ""RT58"" register "uid" = "1" register "desc" = ""Realtek RT5682"" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(62)" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPIO_84)" register "property_count" = "2" register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" register "property_list[0].name" = ""realtek,jd-src"" diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb index 1b43cc8..6d26179 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb @@ -333,7 +333,7 @@ register "name" = ""RT58"" register "uid" = "1" register "desc" = ""Realtek RT5682"" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(62)" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPIO_29)" register "property_count" = "2" register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" register "property_list[0].name" = ""realtek,jd-src"" diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c index 5568194..a07529f 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c @@ -93,8 +93,8 @@ /* EN_PWR_CAMERA */ PAD_GPO(GPIO_76, HIGH), /* GPIO_77 - GPIO_83: Not available */ - /* UNUSED */ - PAD_NC(GPIO_84), + /* HP_INT_ODL */ + PAD_GPI(GPIO_84, PULL_NONE), /* APU_EDP_BL_DISABLE TODP: Set low in depthcharge */ PAD_GPO(GPIO_85, HIGH), /* RAM ID 2 */ diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c index c10c9f4..c6c728e 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c @@ -65,8 +65,8 @@ /* PCIE_RST1_L (unused) */ PAD_NC(GPIO_27), /* GPIO_28: Not available */ - /* GPIO_29: unused */ - PAD_NC(GPIO_29), + /* GPIO_29: HP_INT_ODL */ + PAD_GPI(GPIO_29, PULL_NONE), /* FCH_ESPI_EC_CS_L */ PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE), /* EC_AP_INT_ODL (Sensor Framesync) */ diff --git a/src/mainboard/google/zork/variants/baseboard/ramstage_common.c b/src/mainboard/google/zork/variants/baseboard/ramstage_common.c index b2c5830..298837b 100644 --- a/src/mainboard/google/zork/variants/baseboard/ramstage_common.c +++ b/src/mainboard/google/zork/variants/baseboard/ramstage_common.c @@ -5,12 +5,65 @@ #include <console/console.h> #include <device/device.h> #include <drivers/amd/i2s_machine_dev/chip.h> +#include <drivers/i2c/generic/chip.h> #include <drivers/usb/acpi/chip.h> #include <ec/google/chromeec/ec.h> #include <soc/gpio.h> #include <soc/pci_devs.h>
extern struct chip_operations drivers_amd_i2s_machine_dev_ops; +extern struct chip_operations drivers_i2c_generic_ops; + + +static void update_hp_int_odl(void) +{ + + static const struct device_path rt5682_path[] = { + { + .type = DEVICE_PATH_PCI, + .pci.devfn = LPC_DEVFN + }, + { + .type = DEVICE_PATH_PNP, + .pnp.port = 0xc09, + .pnp.device = 0x0 + }, + { + .type = DEVICE_PATH_GENERIC, + .generic.id = 0, + .generic.subid = 0 + }, + { + .type = DEVICE_PATH_I2C, + .i2c.device = 0x1a + } + }; + + const struct device *rt5682_dev; + struct drivers_i2c_generic_config *cfg; + struct acpi_gpio *gpio; + + if (!variant_uses_codec_gpi()) + return; + + rt5682_dev = find_dev_nested_path( + pci_root_bus(), rt5682_path, ARRAY_SIZE(rt5682_path)); + if (!rt5682_dev) { + printk(BIOS_ERR, "%s: Failed to find audio device\n", + __func__); + return; + } + + if (rt5682_dev->chip_ops != &drivers_i2c_generic_ops) { + printk(BIOS_ERR, "%s: Incorrect device found\n", __func__); + return; + } + + cfg = config_of(rt5682_dev); + gpio = &cfg->irq_gpio; + gpio->pins[0] = 62; + +}
void variant_audio_update(void) { @@ -49,6 +102,8 @@
break; } + + update_hp_int_odl(); }
static const struct device_path xhci0_bt_path[] = {
-
Furquan Shaikh (Code Review) -
Josie Nordrum (Code Review)
-
Paul Menzel (Code Review)