Change in coreboot[master]: mb/supermicro/x11-lga1151: 3/5 Rewrite pad config using intelp2m
Maxim Polyakov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42918 )
Change subject: mb/supermicro/x11-lga1151: 3/5 Rewrite pad config using intelp2m ......................................................................
mb/supermicro/x11-lga1151: 3/5 Rewrite pad config using intelp2m
Fixes some bit fields to convert to target macros PAD_CFG_*() macros.
Change-Id: I291f5f0f34505c466b610aa4049c8cc35937d140 Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h M src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/include/variant/gpio.h 2 files changed, 54 insertions(+), 53 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/42918/1
diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h index 53b1630..d8a1210 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h +++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h @@ -71,7 +71,7 @@ /* GPP_A12 - GPIO */ /* PAD_CFG_GPO(GPP_A12, 1, PLTRST), */ _PAD_CFG_STRUCT(GPP_A12, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(SCI) | PAD_BUF(RX_DISABLE) | 1, 0), + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, 0),
/* GPP_A13 - SUSWARN# */ /* PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1), */ @@ -158,7 +158,7 @@ /* GPP_B6 - GPIO */ /* PAD_NC(GPP_B6, NONE), */ _PAD_CFG_STRUCT(GPP_B6, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPP_B7 - GPIO */ /* PAD_NC(GPP_B7, NONE), */ @@ -300,7 +300,7 @@ /* GPP_C14 - GPIO */ /* PAD_NC(GPP_C14, NONE), */ _PAD_CFG_STRUCT(GPP_C14, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPP_C15 - GPIO */ /* PAD_NC(GPP_C15, NONE), */ @@ -346,12 +346,12 @@ /* GPP_C23 - GPIO */ /* PAD_NC(GPP_C23, NONE), */ _PAD_CFG_STRUCT(GPP_C23, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPP_D0 - GPIO */ /* PAD_NC(GPP_D0, NONE), */ _PAD_CFG_STRUCT(GPP_D0, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPP_D1 - GPIO */ /* PAD_CFG_GPO(GPP_D1, 1, DEEP), */ @@ -563,7 +563,8 @@ /* GPP_F5 - GPIO */ /* PAD_CFG_GPI_APIC(GPP_F5, NONE, PLTRST), */ _PAD_CFG_STRUCT(GPP_F5, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_TRIG(LEVEL) | + PAD_BUF(TX_DISABLE), 0),
/* GPP_F6 - GPIO */ /* PAD_CFG_GPO(GPP_F6, 1, PLTRST), */ @@ -898,12 +899,12 @@ /* GPD0 - GPIO */ /* PAD_NC(GPD0, NONE), */ _PAD_CFG_STRUCT(GPD0, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPD1 - GPIO */ /* PAD_NC(GPD1, NONE), */ _PAD_CFG_STRUCT(GPD1, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPD2 - LAN_WAKE# */ /* PAD_CFG_NF(GPD2, NONE, PWROK, NF1), */ @@ -933,7 +934,7 @@ /* GPD7 - GPIO */ /* PAD_NC(GPD7, NONE), */ _PAD_CFG_STRUCT(GPD7, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPD8 - SUSCLK */ /* PAD_CFG_NF(GPD8, NONE, PWROK, NF1), */ @@ -943,17 +944,17 @@ /* GPD9 - GPIO */ /* PAD_NC(GPD9, NONE), */ _PAD_CFG_STRUCT(GPD9, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPD10 - GPIO */ /* PAD_NC(GPD10, NONE), */ _PAD_CFG_STRUCT(GPD10, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPD11 - GPIO */ /* PAD_NC(GPD11, NONE), */ _PAD_CFG_STRUCT(GPD11, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPP_I0 - DDPB_HPD0 */ /* PAD_CFG_NF(GPP_I0, NONE, DEEP, NF1), */ diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/include/variant/gpio.h b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/include/variant/gpio.h index 4659418..eee6dee 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/include/variant/gpio.h +++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/include/variant/gpio.h @@ -73,7 +73,7 @@ /* GPP_A12 - GPIO */ /* PAD_NC(GPP_A12, NONE), */ _PAD_CFG_STRUCT(GPP_A12, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPP_A13 - SUSWARN#/SUSPWRDNACK */ /* PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1), */ @@ -133,13 +133,13 @@ /* GPP_B0 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_B0, 1, DEEP, NONE), */ _PAD_CFG_STRUCT(GPP_B0, - PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_B1 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_B1, 1, DEEP, NONE), */ _PAD_CFG_STRUCT(GPP_B1, - PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_B2 - GPIO */ @@ -165,7 +165,7 @@ /* GPP_B6 - GPIO */ /* PAD_NC(GPP_B6, NONE), */ _PAD_CFG_STRUCT(GPP_B6, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPP_B7 - GPIO */ /* PAD_NC(GPP_B7, NONE), */ @@ -190,7 +190,7 @@ /* GPP_B11 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_B11, 0, DEEP, NONE), */ _PAD_CFG_STRUCT(GPP_B11, - PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_BUF(RX_DISABLE), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_B12 - SLP_S0# */ @@ -236,7 +236,7 @@ /* GPP_B20 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_B20, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_B20, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_B21 - GPIO */ @@ -284,7 +284,7 @@ /* GPP_C5 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_C5, 1, DEEP, NONE), */ _PAD_CFG_STRUCT(GPP_C5, - PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_C6 - SML1CLK (RESERVED) */ @@ -333,7 +333,7 @@ /* GPP_C14 - GPIO */ /* PAD_NC(GPP_C14, NONE), */ _PAD_CFG_STRUCT(GPP_C14, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPP_C15 - GPIO */ /* PAD_NC(GPP_C15, NONE), */ @@ -374,24 +374,24 @@ /* PAD_CFG_GPI_ACPI_SMI(GPP_C22, 20K_PU, DEEP, NONE), */ _PAD_CFG_STRUCT(GPP_C22, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(SMI) | PAD_BUF(TX_DISABLE), - PAD_PULL(20K_PU) | PAD_CFG_OWN_GPIO(DRIVER)), + PAD_PULL(20K_PU)),
/* GPP_C23 - GPIO */ /* PAD_NC(GPP_C23, NONE), */ _PAD_CFG_STRUCT(GPP_C23, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPIO Group GPP_D */
/* GPP_D0 - GPIO */ /* PAD_NC(GPP_D0, NONE), */ _PAD_CFG_STRUCT(GPP_D0, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPP_D1 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_D1, 1, DEEP, NONE), */ _PAD_CFG_STRUCT(GPP_D1, - PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_D2 - GPIO */ @@ -408,7 +408,7 @@ /* GPP_D4 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_D4, 0, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_D4, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE), + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_D5 - GPIO */ @@ -479,13 +479,13 @@ /* GPP_D18 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_D18, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_D18, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_D19 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_D19, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_D19, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_D20 - GPIO */ @@ -496,7 +496,7 @@ /* GPP_D21 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_D21, 0, DEEP, NONE), */ _PAD_CFG_STRUCT(GPP_D21, - PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_BUF(RX_DISABLE), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_D22 - GPIO */ @@ -608,25 +608,25 @@ /* GPP_F5 - GPIO */ /* PAD_CFG_GPI_APIC(GPP_F5, NONE, PLTRST), */ _PAD_CFG_STRUCT(GPP_F5, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE), - PAD_CFG_OWN_GPIO(DRIVER)), + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(LEVEL) | PAD_IRQ_ROUTE(IOAPIC) | + PAD_BUF(TX_DISABLE), 0),
/* GPP_F6 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_F6, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_F6, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_F7 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_F7, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_F7, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_F8 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_F8, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_F8, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_F9 - GPIO */ @@ -703,7 +703,7 @@ /* GPP_F23 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_F23, 0, PWROK, NONE), */ _PAD_CFG_STRUCT(GPP_F23, - PAD_FUNC(GPIO) | PAD_BUF(RX_DISABLE), + PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), PAD_CFG_OWN_GPIO(DRIVER)),
/* GPIO Group GPP_G */ @@ -842,7 +842,7 @@ /* GPP_H0 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H0, 1, DEEP, NONE), */ _PAD_CFG_STRUCT(GPP_H0, - PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H1 - GPIO */ @@ -854,13 +854,13 @@ /* GPP_H2 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H2, 1, DEEP, NONE), */ _PAD_CFG_STRUCT(GPP_H2, - PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H3 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H3, 1, DEEP, NONE), */ _PAD_CFG_STRUCT(GPP_H3, - PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H4 - GPIO */ @@ -872,31 +872,31 @@ /* GPP_H5 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H5, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_H5, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H6 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H6, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_H6, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H7 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H7, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_H7, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H8 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H8, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_H8, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H9 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H9, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_H9, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H10 - SML2CLK */ @@ -947,31 +947,31 @@ /* GPP_H19 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H19, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_H19, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H20 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H20, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_H20, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H21 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H21, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_H21, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H22 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H22, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_H22, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H23 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H23, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_H23, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPIO Group GPP_I */ @@ -1036,12 +1036,12 @@ /* GPD0 - GPIO */ /* PAD_NC(GPD0, NONE), */ _PAD_CFG_STRUCT(GPD0, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPD1 - GPIO */ /* PAD_NC(GPD1, NONE), */ _PAD_CFG_STRUCT(GPD1, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPD2 - LAN_WAKE# */ /* PAD_CFG_NF(GPD2, NONE, PWROK, NF1), */ @@ -1071,7 +1071,7 @@ /* GPD7 - GPIO */ /* PAD_NC(GPD7, NONE), */ _PAD_CFG_STRUCT(GPD7, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPD8 - SUSCLK */ /* PAD_CFG_NF(GPD8, NONE, PWROK, NF1), */ @@ -1081,17 +1081,17 @@ /* GPD9 - GPIO */ /* PAD_NC(GPD9, NONE), */ _PAD_CFG_STRUCT(GPD9, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPD10 - GPIO */ /* PAD_NC(GPD10, NONE), */ _PAD_CFG_STRUCT(GPD10, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPD11 - GPIO */ /* PAD_NC(GPD11, NONE), */ _PAD_CFG_STRUCT(GPD11, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), };
/* Early pad configuration in romstage. */
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42918 )
Change subject: mb/supermicro/x11-lga1151: 3/5 Rewrite pad config using intelp2m ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42918/2/src/mainboard/supermicro/x1... File src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h:
https://review.coreboot.org/c/coreboot/+/42918/2/src/mainboard/supermicro/x1... PS2, Line 74: PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, 0), line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42918 )
Change subject: mb/supermicro/x11-lga1151: 3/5 Rewrite pad config using intelp2m ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42918/3/src/mainboard/supermicro/x1... File src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h:
https://review.coreboot.org/c/coreboot/+/42918/3/src/mainboard/supermicro/x1... PS3, Line 74: PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, 0), line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42918 )
Change subject: mb/supermicro/x11-lga1151: 3/5 Rewrite pad config using intelp2m ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42918/3/src/mainboard/supermicro/x1... File src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h:
https://review.coreboot.org/c/coreboot/+/42918/3/src/mainboard/supermicro/x1... PS3, Line 74: PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, 0), line over 96 characters
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42918
to look at the new patch set (#4).
Change subject: supermicro/x11-lga1151/gpio: 3/5 Fixes some field macro ......................................................................
supermicro/x11-lga1151/gpio: 3/5 Fixes some field macro
Fixes some bit fields to convert to target macros PAD_CFG_*() macros.
This is part of the patch set "mb/supermicro/x11-lga1151: Rewrite pad config using intelp2m":
CB:42916 - 1/5 Decode raw register values CB:42917 - 2/5 Exclude fields for PAD_CFG CB:42918 - 3/5 Fixes some field macro CB:35679 - 3/4 Convert field macros to PAD_CFG CB:42919 - 5/5 Remap reset sources
Change-Id: I291f5f0f34505c466b610aa4049c8cc35937d140 Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h M src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/include/variant/gpio.h 2 files changed, 54 insertions(+), 53 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/42918/4
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42918
to look at the new patch set (#5).
Change subject: supermicro/x11-lga1151/gpio: 3/5 Fixes some field macro ......................................................................
supermicro/x11-lga1151/gpio: 3/5 Fixes some field macro
Fixes some bit fields to convert to target macros PAD_CFG_*() macros.
This is part of the patch set "mb/supermicro/x11-lga1151: Rewrite pad config using intelp2m":
CB:42916 - 1/5 Decode raw register values CB:42917 - 2/5 Exclude fields for PAD_CFG CB:42918 - 3/5 Fixes some field macro CB:35679 - 3/4 Convert field macros to PAD_CFG CB:42919 - 5/5 Remap reset sources
Change-Id: I291f5f0f34505c466b610aa4049c8cc35937d140 Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h M src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/include/variant/gpio.h 2 files changed, 54 insertions(+), 53 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/42918/5
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42918 )
Change subject: supermicro/x11-lga1151/gpio: 3/5 Fixes some field macro ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42918/5/src/mainboard/supermicro/x1... File src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h:
https://review.coreboot.org/c/coreboot/+/42918/5/src/mainboard/supermicro/x1... PS5, Line 74: PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, 0), line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42918 )
Change subject: supermicro/x11-lga1151/gpio: 3/5 Fixes some field macro ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42918/6/src/mainboard/supermicro/x1... File src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h:
https://review.coreboot.org/c/coreboot/+/42918/6/src/mainboard/supermicro/x1... PS6, Line 74: PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, 0), line over 96 characters
Hello build bot (Jenkins), Michael Niewöhner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42918
to look at the new patch set (#7).
Change subject: supermicro/x11-lga1151/gpio: 3/4 Fixes some field macro ......................................................................
supermicro/x11-lga1151/gpio: 3/4 Fixes some field macro
Fixes some bit fields to convert to target macros PAD_CFG_*() macros.
This is part of the patch set "mb/supermicro/x11-lga1151: Rewrite pad config using intelp2m":
CB:42916 - 1/4 Decode raw register values CB:42917 - 2/4 Exclude fields for PAD_CFG CB:42918 - 3/4 Fixes some field macro CB:35679 - 4/4 Convert field macros to PAD_CFG
Change-Id: I291f5f0f34505c466b610aa4049c8cc35937d140 Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h M src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/include/variant/gpio.h 2 files changed, 53 insertions(+), 52 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/42918/7
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42918 )
Change subject: supermicro/x11-lga1151/gpio: 3/4 Fixes some field macro ......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42918/7/src/mainboard/supermicro/x1... File src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h:
https://review.coreboot.org/c/coreboot/+/42918/7/src/mainboard/supermicro/x1... PS7, Line 74: PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, 0), line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42918 )
Change subject: supermicro/x11-lga1151/gpio: 3/4 Fixes some field macro ......................................................................
Patch Set 8:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42918/8/src/mainboard/supermicro/x1... File src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h:
https://review.coreboot.org/c/coreboot/+/42918/8/src/mainboard/supermicro/x1... PS8, Line 74: PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, 0), line over 96 characters
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42918 )
Change subject: supermicro/x11-lga1151/gpio: 3/4 Fixes some field macro ......................................................................
Patch Set 8: Code-Review+2
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42918 )
Change subject: supermicro/x11-lga1151/gpio: 3/4 Fixes some field macro ......................................................................
Patch Set 9:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42918/9/src/mainboard/supermicro/x1... File src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h:
https://review.coreboot.org/c/coreboot/+/42918/9/src/mainboard/supermicro/x1... PS9, Line 74: PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, 0), line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42918 )
Change subject: supermicro/x11-lga1151/gpio: 3/4 Fixes some field macro ......................................................................
Patch Set 10:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42918/10/src/mainboard/supermicro/x... File src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h:
https://review.coreboot.org/c/coreboot/+/42918/10/src/mainboard/supermicro/x... PS10, Line 74: PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, 0), line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42918 )
Change subject: supermicro/x11-lga1151/gpio: 3/4 Fixes some field macro ......................................................................
Patch Set 12:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42918/12/src/mainboard/supermicro/x... File src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h:
https://review.coreboot.org/c/coreboot/+/42918/12/src/mainboard/supermicro/x... PS12, Line 74: PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, 0), line over 96 characters
Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42918 )
Change subject: supermicro/x11-lga1151/gpio: 3/4 Fixes some field macro ......................................................................
supermicro/x11-lga1151/gpio: 3/4 Fixes some field macro
Fixes some bit fields to convert to target macros PAD_CFG_*() macros.
This is part of the patch set "mb/supermicro/x11-lga1151: Rewrite pad config using intelp2m":
CB:42916 - 1/4 Decode raw register values CB:42917 - 2/4 Exclude fields for PAD_CFG CB:42918 - 3/4 Fixes some field macro CB:35679 - 4/4 Convert field macros to PAD_CFG
Change-Id: I291f5f0f34505c466b610aa4049c8cc35937d140 Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/42918 Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h M src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/include/variant/gpio.h 2 files changed, 53 insertions(+), 52 deletions(-)
Approvals: build bot (Jenkins): Verified Michael Niewöhner: Looks good to me, approved
diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h index d12d7b6..3034395 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h +++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h @@ -71,7 +71,7 @@ /* GPP_A12 - GPIO */ /* PAD_CFG_GPO(GPP_A12, 1, PLTRST), */ _PAD_CFG_STRUCT(GPP_A12, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(SCI) | PAD_BUF(RX_DISABLE) | 1, 0), + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, 0),
/* GPP_A13 - SUSWARN# */ /* PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1), */ @@ -158,7 +158,7 @@ /* GPP_B6 - GPIO */ /* PAD_NC(GPP_B6, NONE), */ _PAD_CFG_STRUCT(GPP_B6, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPP_B7 - GPIO */ /* PAD_NC(GPP_B7, NONE), */ @@ -300,7 +300,7 @@ /* GPP_C14 - GPIO */ /* PAD_NC(GPP_C14, NONE), */ _PAD_CFG_STRUCT(GPP_C14, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPP_C15 - GPIO */ /* PAD_NC(GPP_C15, NONE), */ @@ -346,12 +346,12 @@ /* GPP_C23 - GPIO */ /* PAD_NC(GPP_C23, NONE), */ _PAD_CFG_STRUCT(GPP_C23, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPP_D0 - GPIO */ /* PAD_NC(GPP_D0, NONE), */ _PAD_CFG_STRUCT(GPP_D0, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPP_D1 - GPIO */ /* PAD_CFG_GPO(GPP_D1, 1, DEEP), */ @@ -563,7 +563,8 @@ /* GPP_F5 - GPIO */ /* PAD_CFG_GPI_APIC(GPP_F5, NONE, PLTRST), */ _PAD_CFG_STRUCT(GPP_F5, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_TRIG(LEVEL) | + PAD_BUF(TX_DISABLE), 0),
/* GPP_F6 - GPIO */ /* PAD_CFG_GPO(GPP_F6, 1, PLTRST), */ @@ -898,12 +899,12 @@ /* GPD0 - GPIO */ /* PAD_NC(GPD0, NONE), */ _PAD_CFG_STRUCT(GPD0, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPD1 - GPIO */ /* PAD_NC(GPD1, NONE), */ _PAD_CFG_STRUCT(GPD1, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPD2 - LAN_WAKE# */ /* PAD_CFG_NF(GPD2, NONE, PWROK, NF1), */ @@ -933,7 +934,7 @@ /* GPD7 - GPIO */ /* PAD_NC(GPD7, NONE), */ _PAD_CFG_STRUCT(GPD7, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPD8 - SUSCLK */ /* PAD_CFG_NF(GPD8, NONE, PWROK, NF1), */ @@ -943,17 +944,17 @@ /* GPD9 - GPIO */ /* PAD_NC(GPD9, NONE), */ _PAD_CFG_STRUCT(GPD9, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPD10 - GPIO */ /* PAD_NC(GPD10, NONE), */ _PAD_CFG_STRUCT(GPD10, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPD11 - GPIO */ /* PAD_NC(GPD11, NONE), */ _PAD_CFG_STRUCT(GPD11, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPP_I0 - DDPB_HPD0 */ /* PAD_CFG_NF(GPP_I0, NONE, DEEP, NF1), */ diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/include/variant/gpio.h b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/include/variant/gpio.h index b35580b..4c84d17 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/include/variant/gpio.h +++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/include/variant/gpio.h @@ -73,7 +73,7 @@ /* GPP_A12 - GPIO */ /* PAD_NC(GPP_A12, NONE), */ _PAD_CFG_STRUCT(GPP_A12, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPP_A13 - SUSWARN#/SUSPWRDNACK */ /* PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1), */ @@ -133,13 +133,13 @@ /* GPP_B0 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_B0, 1, DEEP, NONE), */ _PAD_CFG_STRUCT(GPP_B0, - PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_B1 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_B1, 1, DEEP, NONE), */ _PAD_CFG_STRUCT(GPP_B1, - PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_B2 - GPIO */ @@ -165,7 +165,7 @@ /* GPP_B6 - GPIO */ /* PAD_NC(GPP_B6, NONE), */ _PAD_CFG_STRUCT(GPP_B6, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPP_B7 - GPIO */ /* PAD_NC(GPP_B7, NONE), */ @@ -190,7 +190,7 @@ /* GPP_B11 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_B11, 0, DEEP, NONE), */ _PAD_CFG_STRUCT(GPP_B11, - PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_BUF(RX_DISABLE), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_B12 - SLP_S0# */ @@ -236,7 +236,7 @@ /* GPP_B20 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_B20, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_B20, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_B21 - GPIO */ @@ -284,7 +284,7 @@ /* GPP_C5 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_C5, 1, DEEP, NONE), */ _PAD_CFG_STRUCT(GPP_C5, - PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_C6 - SML1CLK (RESERVED) */ @@ -333,7 +333,7 @@ /* GPP_C14 - GPIO */ /* PAD_NC(GPP_C14, NONE), */ _PAD_CFG_STRUCT(GPP_C14, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPP_C15 - GPIO */ /* PAD_NC(GPP_C15, NONE), */ @@ -374,24 +374,24 @@ /* PAD_CFG_GPI_ACPI_SMI(GPP_C22, 20K_PU, DEEP, NONE), */ _PAD_CFG_STRUCT(GPP_C22, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(SMI) | PAD_BUF(TX_DISABLE), - PAD_PULL(20K_PU) | PAD_CFG_OWN_GPIO(DRIVER)), + PAD_PULL(20K_PU)),
/* GPP_C23 - GPIO */ /* PAD_NC(GPP_C23, NONE), */ _PAD_CFG_STRUCT(GPP_C23, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPIO Group GPP_D */
/* GPP_D0 - GPIO */ /* PAD_NC(GPP_D0, NONE), */ _PAD_CFG_STRUCT(GPP_D0, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPP_D1 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_D1, 1, DEEP, NONE), */ _PAD_CFG_STRUCT(GPP_D1, - PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_D2 - GPIO */ @@ -408,7 +408,7 @@ /* GPP_D4 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_D4, 0, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_D4, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE), + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_D5 - GPIO */ @@ -479,13 +479,13 @@ /* GPP_D18 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_D18, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_D18, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_D19 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_D19, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_D19, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_D20 - GPIO */ @@ -496,7 +496,7 @@ /* GPP_D21 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_D21, 0, DEEP, NONE), */ _PAD_CFG_STRUCT(GPP_D21, - PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_BUF(RX_DISABLE), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_D22 - GPIO */ @@ -608,25 +608,25 @@ /* GPP_F5 - GPIO */ /* PAD_CFG_GPI_APIC(GPP_F5, NONE, PLTRST), */ _PAD_CFG_STRUCT(GPP_F5, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE), - PAD_CFG_OWN_GPIO(DRIVER)), + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(LEVEL) | PAD_IRQ_ROUTE(IOAPIC) | + PAD_BUF(TX_DISABLE), 0),
/* GPP_F6 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_F6, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_F6, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_F7 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_F7, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_F7, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_F8 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_F8, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_F8, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_F9 - GPIO */ @@ -842,7 +842,7 @@ /* GPP_H0 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H0, 1, DEEP, NONE), */ _PAD_CFG_STRUCT(GPP_H0, - PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H1 - GPIO */ @@ -854,13 +854,13 @@ /* GPP_H2 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H2, 1, DEEP, NONE), */ _PAD_CFG_STRUCT(GPP_H2, - PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H3 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H3, 1, DEEP, NONE), */ _PAD_CFG_STRUCT(GPP_H3, - PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H4 - GPIO */ @@ -872,31 +872,31 @@ /* GPP_H5 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H5, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_H5, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H6 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H6, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_H6, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H7 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H7, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_H7, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H8 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H8, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_H8, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H9 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H9, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_H9, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H10 - SML2CLK */ @@ -947,31 +947,31 @@ /* GPP_H19 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H19, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_H19, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H20 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H20, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_H20, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H21 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H21, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_H21, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H22 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H22, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_H22, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPP_H23 - GPIO */ /* PAD_CFG_GPO_GPIO_DRIVER(GPP_H23, 1, PLTRST, NONE), */ _PAD_CFG_STRUCT(GPP_H23, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(RX_DISABLE) | 1, + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),
/* GPIO Group GPP_I */ @@ -1036,12 +1036,12 @@ /* GPD0 - GPIO */ /* PAD_NC(GPD0, NONE), */ _PAD_CFG_STRUCT(GPD0, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPD1 - GPIO */ /* PAD_NC(GPD1, NONE), */ _PAD_CFG_STRUCT(GPD1, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPD2 - LAN_WAKE# */ /* PAD_CFG_NF(GPD2, NONE, PWROK, NF1), */ @@ -1071,7 +1071,7 @@ /* GPD7 - GPIO */ /* PAD_NC(GPD7, NONE), */ _PAD_CFG_STRUCT(GPD7, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPD8 - SUSCLK */ /* PAD_CFG_NF(GPD8, NONE, PWROK, NF1), */ @@ -1081,17 +1081,17 @@ /* GPD9 - GPIO */ /* PAD_NC(GPD9, NONE), */ _PAD_CFG_STRUCT(GPD9, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPD10 - GPIO */ /* PAD_NC(GPD10, NONE), */ _PAD_CFG_STRUCT(GPD10, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),
/* GPD11 - GPIO */ /* PAD_NC(GPD11, NONE), */ _PAD_CFG_STRUCT(GPD11, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), };
/* Early pad configuration in romstage. */
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42918 )
Change subject: supermicro/x11-lga1151/gpio: 3/4 Fixes some field macro ......................................................................
Patch Set 13:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42918/13/src/mainboard/supermicro/x... File src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h:
https://review.coreboot.org/c/coreboot/+/42918/13/src/mainboard/supermicro/x... PS13, Line 74: PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, 0), line over 96 characters
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build bot (Jenkins) (Code Review) -
Maxim Polyakov (Code Review)
-
Michael Niewöhner (Code Review)