[S] Change in coreboot[main]: soc/intel/tigerlake: Add IRQ mapping for PEG PCI-E ports - coreboot-gerrit

1 Mar 2024


      Attention is currently required from: Alicja Michalska, Nick Vaccaro.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80848?usp=email )
Change subject: soc/intel/tigerlake: Add IRQ mapping for PEG PCI-E ports
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Patch Set 1: Code-Review+2
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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: If102522efa1a67b362b14d859d9e27a37bad85a4
Gerrit-Change-Number: 80848
Gerrit-PatchSet: 1
Gerrit-Owner: Alicja Michalska ahplka19@gmail.com
Gerrit-Reviewer: Nick Vaccaro nvaccaro@chromium.org
Gerrit-Reviewer: Subrata Banik subratabanik@google.com
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Gerrit-Attention: Alicja Michalska ahplka19@gmail.com
Gerrit-Attention: Nick Vaccaro nvaccaro@chromium.org
Gerrit-Comment-Date: Fri, 01 Mar 2024 05:58:55 +0000
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