Change in coreboot[master]: mb/google/puff: update USB2 strength

[Edward O'Callaghan (Code Review)]

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/40482 )

Change subject: mb/google/puff: update USB2 strength
......................................................................

mb/google/puff: update USB2 strength

Based on USB SI report to fine tune the strength for USB2 port0.

BRANCH=none
BUG=b:153590143
TEST=build and test USB2 port0 function works fine.

Change-Id: I070c9e1c8153a680fb8f827889738a764d7ea9f4
Signed-off-by: Tim Chen 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40482
Tested-by: build bot (Jenkins) 
Reviewed-by: Kangheui Won 
Reviewed-by: Edward O'Callaghan 
---
M src/mainboard/google/hatch/variants/duffy/overridetree.cb
M src/mainboard/google/hatch/variants/kaisa/overridetree.cb
M src/mainboard/google/hatch/variants/puff/overridetree.cb
3 files changed, 24 insertions(+), 3 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Edward O'Callaghan: Looks good to me, approved
  Kangheui Won: Looks good to me, but someone else must approve

diff --git a/src/mainboard/google/hatch/variants/duffy/overridetree.cb b/src/mainboard/google/hatch/variants/duffy/overridetree.cb
index ade12c5..d7acbd7 100644
--- a/src/mainboard/google/hatch/variants/duffy/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/duffy/overridetree.cb
@@ -21,7 +21,14 @@
    }"

# USB configuration
-	register "usb2_ports[0]" = "USB2_PORT_MID(OC2)"        # Type-A Port 2
+	register "usb2_ports[0]" = "{
+		.enable = 1,
+		.ocpin = OC2,
+		.tx_bias = USB2_BIAS_0MV,
+		.tx_emp_enable = USB2_PRE_EMP_ON,
+		.pre_emp_bias  = USB2_BIAS_11P25MV,
+		.pre_emp_bit   = USB2_HALF_BIT_PRE_EMP,
+	}" # Type-A Port 2
    register "usb2_ports[1]" = "{
    	.enable = 1,
    	.ocpin = OC1,
diff --git a/src/mainboard/google/hatch/variants/kaisa/overridetree.cb b/src/mainboard/google/hatch/variants/kaisa/overridetree.cb
index e2380f4..f5e85bd 100644
--- a/src/mainboard/google/hatch/variants/kaisa/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/kaisa/overridetree.cb
@@ -21,7 +21,14 @@
    }"

# USB configuration
-	register "usb2_ports[0]" = "USB2_PORT_MID(OC2)"        # Type-A Port 2
+	register "usb2_ports[0]" = "{
+		.enable = 1,
+		.ocpin = OC2,
+		.tx_bias = USB2_BIAS_0MV,
+		.tx_emp_enable = USB2_PRE_EMP_ON,
+		.pre_emp_bias  = USB2_BIAS_11P25MV,
+		.pre_emp_bit   = USB2_HALF_BIT_PRE_EMP,
+	}" # Type-A Port 2
    register "usb2_ports[1]" = "{
    	.enable = 1,
    	.ocpin = OC1,
diff --git a/src/mainboard/google/hatch/variants/puff/overridetree.cb b/src/mainboard/google/hatch/variants/puff/overridetree.cb
index d869b28..31efc4a 100644
--- a/src/mainboard/google/hatch/variants/puff/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/puff/overridetree.cb
@@ -24,7 +24,14 @@
    # NOTE: This only applies to Puff,
    # usb2_ports[1] and usb2_ports[3] were swapped on
    # reference schematics after Puff has been built.
-	register "usb2_ports[0]" = "USB2_PORT_MID(OC2)"        # Type-A Port 2
+	register "usb2_ports[0]" = "{
+		.enable = 1,
+		.ocpin = OC2,
+		.tx_bias = USB2_BIAS_0MV,
+		.tx_emp_enable = USB2_PRE_EMP_ON,
+		.pre_emp_bias  = USB2_BIAS_11P25MV,
+		.pre_emp_bit   = USB2_HALF_BIT_PRE_EMP,
+	}" # Type-A Port 2
    register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C Port
    register "usb2_ports[2]" = "{
    	.enable = 1,