Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46141 )
Change subject: soc/intel/common: Add PCI driver for USB4 ports ......................................................................
soc/intel/common: Add PCI driver for USB4 ports
In order to enable SSDT generation for Intel USB4 ports, a minimal PCI driver is required.
Change-Id: Ib9da051307b883eb99e500114378c9fd842ffc92 Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org --- A src/soc/intel/common/block/usb4/Kconfig A src/soc/intel/common/block/usb4/Makefile.inc A src/soc/intel/common/block/usb4/usb4.c 3 files changed, 32 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/46141/1
diff --git a/src/soc/intel/common/block/usb4/Kconfig b/src/soc/intel/common/block/usb4/Kconfig new file mode 100644 index 0000000..f68c5a7 --- /dev/null +++ b/src/soc/intel/common/block/usb4/Kconfig @@ -0,0 +1,6 @@ +config SOC_INTEL_COMMON_BLOCK_USB4 + bool + default n + help + Minimal PCI Driver for enabling SSDT generation for Intel + Thunderbolt/USB4 ports. diff --git a/src/soc/intel/common/block/usb4/Makefile.inc b/src/soc/intel/common/block/usb4/Makefile.inc new file mode 100644 index 0000000..7dad4ba --- /dev/null +++ b/src/soc/intel/common/block/usb4/Makefile.inc @@ -0,0 +1 @@ +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_USB4) += usb4.c diff --git a/src/soc/intel/common/block/usb4/usb4.c b/src/soc/intel/common/block/usb4/usb4.c new file mode 100644 index 0000000..3fc1159 --- /dev/null +++ b/src/soc/intel/common/block/usb4/usb4.c @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ids.h> + +static const unsigned short pci_device_ids[] = { + PCI_DEVICE_ID_INTEL_TGL_TBT_DMA0, + PCI_DEVICE_ID_INTEL_TGL_TBT_DMA1, + 0 +}; + +static struct device_operations usb4_dev_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .scan_bus = scan_generic_bus, + .ops_pci = &pci_dev_ops_pci, +}; + +static const struct pci_driver usb4_driver __pci_driver = { + .ops = &usb4_dev_ops, + .vendor = PCI_VENDOR_ID_INTEL, + .devices = pci_device_ids, +};
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46141 )
Change subject: soc/intel/common: Add PCI driver for USB4 ports ......................................................................
Patch Set 4:
(3 comments)
https://review.coreboot.org/c/coreboot/+/46141/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46141/4//COMMIT_MSG@9 PS4, Line 9: minimal nit: probably should avoid using "minimal" since it might be thought of as related to MINIMAL_PCI_SCANNING. :P
https://review.coreboot.org/c/coreboot/+/46141/4/src/soc/intel/common/block/... File src/soc/intel/common/block/usb4/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/46141/4/src/soc/intel/common/block/... PS4, Line 1: usb4 This file is added here and in the next CL gets dropped? I am confused.
https://review.coreboot.org/c/coreboot/+/46141/4/src/soc/intel/common/block/... File src/soc/intel/common/block/usb4/usb4.c:
https://review.coreboot.org/c/coreboot/+/46141/4/src/soc/intel/common/block/... PS4, Line 17: scan_generic_bus Do we need a separate driver basically because we want the ability to scan for downstream non-PCI devices defined in the device tree under this controller?
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46141 )
Change subject: soc/intel/common: Add PCI driver for USB4 ports ......................................................................
Patch Set 4:
(2 comments)
https://review.coreboot.org/c/coreboot/+/46141/4/src/soc/intel/common/block/... File src/soc/intel/common/block/usb4/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/46141/4/src/soc/intel/common/block/... PS4, Line 1: usb4
This file is added here and in the next CL gets dropped? I am confused.
That one needs a rebase.
https://review.coreboot.org/c/coreboot/+/46141/4/src/soc/intel/common/block/... File src/soc/intel/common/block/usb4/usb4.c:
https://review.coreboot.org/c/coreboot/+/46141/4/src/soc/intel/common/block/... PS4, Line 17: scan_generic_bus
Do we need a separate driver basically because we want the ability to scan for downstream non-PCI de […]
Yes, that's exactly it. I'll update the commit message to make that clear.
Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Duncan Laurie, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46141
to look at the new patch set (#5).
Change subject: soc/intel/common: Add PCI driver for USB4 ports ......................................................................
soc/intel/common: Add PCI driver for USB4 ports
In order to enable SSDT generation for Intel USB4 ports, a minimal PCI driver is required. This patch more or less adds a `scan_bus` callback that will handle non-PCI devices downstream.
Change-Id: Ib9da051307b883eb99e500114378c9fd842ffc92 Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org --- A src/soc/intel/common/block/usb4/Kconfig A src/soc/intel/common/block/usb4/Makefile.inc A src/soc/intel/common/block/usb4/usb4.c 3 files changed, 32 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/46141/5
Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Duncan Laurie, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46141
to look at the new patch set (#7).
Change subject: soc/intel/common: Add PCI driver for USB4 ports ......................................................................
soc/intel/common: Add PCI driver for USB4 ports
In order to enable SSDT generation for Intel USB4 ports, a PCI driver is required. This patch more or less adds a `scan_bus` callback that will handle non-PCI devices downstream.
Change-Id: Ib9da051307b883eb99e500114378c9fd842ffc92 Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org --- A src/soc/intel/common/block/usb4/Kconfig A src/soc/intel/common/block/usb4/Makefile.inc A src/soc/intel/common/block/usb4/usb4.c 3 files changed, 32 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/46141/7
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46141 )
Change subject: soc/intel/common: Add PCI driver for USB4 ports ......................................................................
Patch Set 7: Code-Review+2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46141 )
Change subject: soc/intel/common: Add PCI driver for USB4 ports ......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46141/7/src/soc/intel/common/block/... File src/soc/intel/common/block/usb4/usb4.c:
https://review.coreboot.org/c/coreboot/+/46141/7/src/soc/intel/common/block/... PS7, Line 18: .ops_pci = &pci_dev_ops_pci, nit: We should also add `.acpi_name` support here. I am thinking eventually we should get rid of having a big if-else/switch case in SoC chip.c to return ACPI names for all controllers and instead have the appropriate driver generate both the device node(`acpi_fill_ssdt`) as well as return its ACPI name(`acpi_name`).
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46141 )
Change subject: soc/intel/common: Add PCI driver for USB4 ports ......................................................................
Patch Set 7:
(2 comments)
https://review.coreboot.org/c/coreboot/+/46141/7//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46141/7//COMMIT_MSG@7 PS7, Line 7: USB4 ports Isn't this really the DMA controller for USB4/TBT?
https://review.coreboot.org/c/coreboot/+/46141/7/src/soc/intel/common/block/... File src/soc/intel/common/block/usb4/Kconfig:
https://review.coreboot.org/c/coreboot/+/46141/7/src/soc/intel/common/block/... PS7, Line 6: Thunderbolt/USB4 ports This is really just the DMA component, right?
Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Duncan Laurie, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46141
to look at the new patch set (#8).
Change subject: soc/intel/common: Add PCI driver for USB4 ports ......................................................................
soc/intel/common: Add PCI driver for USB4 ports
In order to enable SSDT generation for the DMA component of Intel USB4 ports, a PCI driver is required. This patch more or less adds a `scan_bus` callback that will handle non-PCI devices downstream.
Change-Id: Ib9da051307b883eb99e500114378c9fd842ffc92 Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org --- A src/soc/intel/common/block/usb4/Kconfig A src/soc/intel/common/block/usb4/Makefile.inc A src/soc/intel/common/block/usb4/usb4.c 3 files changed, 46 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/46141/8
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46141 )
Change subject: soc/intel/common: Add PCI driver for USB4 ports ......................................................................
Patch Set 7:
(3 comments)
https://review.coreboot.org/c/coreboot/+/46141/7//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46141/7//COMMIT_MSG@7 PS7, Line 7: USB4 ports
Isn't this really the DMA controller for USB4/TBT?
Yeah, naming things is hard :( I'll add that in.
https://review.coreboot.org/c/coreboot/+/46141/7/src/soc/intel/common/block/... File src/soc/intel/common/block/usb4/Kconfig:
https://review.coreboot.org/c/coreboot/+/46141/7/src/soc/intel/common/block/... PS7, Line 6: Thunderbolt/USB4 ports
This is really just the DMA component, right?
ditto.
https://review.coreboot.org/c/coreboot/+/46141/7/src/soc/intel/common/block/... File src/soc/intel/common/block/usb4/usb4.c:
https://review.coreboot.org/c/coreboot/+/46141/7/src/soc/intel/common/block/... PS7, Line 18: .ops_pci = &pci_dev_ops_pci,
nit: We should also add `.acpi_name` support here. […]
+1, done.
Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Duncan Laurie, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46141
to look at the new patch set (#9).
Change subject: soc/intel/common: Add PCI driver for USB4 ports ......................................................................
soc/intel/common: Add PCI driver for USB4 ports
In order to enable SSDT generation for the DMA component of Intel USB4 ports, a PCI driver is required. This patch more or less adds a `scan_bus` callback that will handle non-PCI devices downstream.
Change-Id: Ib9da051307b883eb99e500114378c9fd842ffc92 Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org --- A src/soc/intel/common/block/usb4/Kconfig A src/soc/intel/common/block/usb4/Makefile.inc A src/soc/intel/common/block/usb4/usb4.c 3 files changed, 32 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/46141/9
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46141 )
Change subject: soc/intel/common: Add PCI driver for USB4 ports ......................................................................
Patch Set 9: Code-Review+2
Tim Wawrzynczak has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46141 )
Change subject: soc/intel/common: Add PCI driver for USB4 ports ......................................................................
soc/intel/common: Add PCI driver for USB4 ports
In order to enable SSDT generation for the DMA component of Intel USB4 ports, a PCI driver is required. This patch more or less adds a `scan_bus` callback that will handle non-PCI devices downstream.
Change-Id: Ib9da051307b883eb99e500114378c9fd842ffc92 Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org Reviewed-on: https://review.coreboot.org/c/coreboot/+/46141 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com --- A src/soc/intel/common/block/usb4/Kconfig A src/soc/intel/common/block/usb4/Makefile.inc A src/soc/intel/common/block/usb4/usb4.c 3 files changed, 32 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/soc/intel/common/block/usb4/Kconfig b/src/soc/intel/common/block/usb4/Kconfig new file mode 100644 index 0000000..1516e75 --- /dev/null +++ b/src/soc/intel/common/block/usb4/Kconfig @@ -0,0 +1,6 @@ +config SOC_INTEL_COMMON_BLOCK_USB4 + bool + default n + help + Minimal PCI Driver for enabling SSDT generation for the DMA component + of Intel Thunderbolt/USB4 ports. diff --git a/src/soc/intel/common/block/usb4/Makefile.inc b/src/soc/intel/common/block/usb4/Makefile.inc new file mode 100644 index 0000000..7dad4ba --- /dev/null +++ b/src/soc/intel/common/block/usb4/Makefile.inc @@ -0,0 +1 @@ +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_USB4) += usb4.c diff --git a/src/soc/intel/common/block/usb4/usb4.c b/src/soc/intel/common/block/usb4/usb4.c new file mode 100644 index 0000000..a0afc20 --- /dev/null +++ b/src/soc/intel/common/block/usb4/usb4.c @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ids.h> + +static const unsigned short pci_device_ids[] = { + PCI_DEVICE_ID_INTEL_TGL_TBT_DMA0, + PCI_DEVICE_ID_INTEL_TGL_TBT_DMA1, + 0 +}; + +static struct device_operations usb4_dev_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .scan_bus = scan_generic_bus, + .ops_pci = &pci_dev_ops_pci, +}; + +static const struct pci_driver usb4_driver __pci_driver = { + .ops = &usb4_dev_ops, + .vendor = PCI_VENDOR_ID_INTEL, + .devices = pci_device_ids, +};
-
Furquan Shaikh (Code Review) -
Tim Wawrzynczak (Code Review)