Chris Ching has uploaded this change for review. ( https://review.coreboot.org/23625
Change subject: soc/amd/stoneyridge: Add gpio_interrupt_status ......................................................................
soc/amd/stoneyridge: Add gpio_interrupt_status
BUG=b:72838769 BRANCH=none TEST=read interrupt and check is cleared on grunt TPM
Change-Id: I7ed76eaf56338a314a8d0ee6faad1ab8dbf8dfb0 Signed-off-by: Chris Ching chingcodes@chromium.org --- M src/soc/amd/stoneyridge/gpio.c M src/soc/amd/stoneyridge/include/soc/gpio.h 2 files changed, 20 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/23625/1
diff --git a/src/soc/amd/stoneyridge/gpio.c b/src/soc/amd/stoneyridge/gpio.c index ec02c99..d1ffc39 100644 --- a/src/soc/amd/stoneyridge/gpio.c +++ b/src/soc/amd/stoneyridge/gpio.c @@ -117,3 +117,19 @@
write32((void *)gpio_address, reg | flags); } + +int gpio_interrupt_status(gpio_t gpio) +{ + uint32_t reg; + uintptr_t gpio_address = gpio_get_address(gpio); + + reg = read32((void *)gpio_address); + + if (reg & GPIO_INT_STATUS) { + /* Clear the status bit. */ + write32((void *)gpio_address, reg); + return 1; + } + + return 0; +} diff --git a/src/soc/amd/stoneyridge/include/soc/gpio.h b/src/soc/amd/stoneyridge/include/soc/gpio.h index 63f6dfa..8b00976 100644 --- a/src/soc/amd/stoneyridge/include/soc/gpio.h +++ b/src/soc/amd/stoneyridge/include/soc/gpio.h @@ -158,5 +158,9 @@ /* Configure the gpio with specific flags. */ void gpio_set_config(gpio_t gpio, uint32_t flags);
+ +/* Return the interrupt status and clear if set. */ +int gpio_interrupt_status(gpio_t gpio); + #endif /* __ACPI__ */ #endif /* __STONEYRIDGE_GPIO_H__ */