EricR Lai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48070 )
Change subject: mb/google/brya: Set UART console ......................................................................
mb/google/brya: Set UART console
Follow latest schematic UART_PCH_DBG is UART 0.
BUG=b:174266035 TEST=Build Test
Signed-off-by: Eric Lai ericr_lai@compal.corp-partner.google.com Change-Id: I8e334fee1adcd79d058b7ab07127f8ecf1735202 --- M src/mainboard/google/brya/Kconfig 1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/48070/1
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index e448e18..4348ef5 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -31,4 +31,8 @@ string default "brya0" if BOARD_GOOGLE_BRYA0
+config UART_FOR_CONSOLE + int + default 0 + endif # BOARD_GOOGLE_BASEBOARD_BRYA
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48070 )
Change subject: mb/google/brya: Set UART console ......................................................................
Patch Set 2: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/48070/2/src/mainboard/google/brya/K... File src/mainboard/google/brya/Kconfig:
https://review.coreboot.org/c/coreboot/+/48070/2/src/mainboard/google/brya/K... PS2, Line 6: select SOC_INTEL_ALDERLAKE include `select INTEL_LPSS_UART_FOR_CONSOLE` as well?
EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48070 )
Change subject: mb/google/brya: Set UART console ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/48070/2/src/mainboard/google/brya/K... File src/mainboard/google/brya/Kconfig:
https://review.coreboot.org/c/coreboot/+/48070/2/src/mainboard/google/brya/K... PS2, Line 6: select SOC_INTEL_ALDERLAKE
include `select INTEL_LPSS_UART_FOR_CONSOLE` as well?
yes, but why don't select this in soc. Interesting.
Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48070
to look at the new patch set (#3).
Change subject: mb/google/brya: Set UART console ......................................................................
mb/google/brya: Set UART console
Follow latest schematic UART_PCH_DBG is UART 0.
BUG=b:174266035 TEST=Build Test
Signed-off-by: Eric Lai ericr_lai@compal.corp-partner.google.com Change-Id: I8e334fee1adcd79d058b7ab07127f8ecf1735202 --- M src/mainboard/google/brya/Kconfig 1 file changed, 5 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/48070/3
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48070 )
Change subject: mb/google/brya: Set UART console ......................................................................
Patch Set 4: Code-Review+2
Tim Wawrzynczak has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48070 )
Change subject: mb/google/brya: Set UART console ......................................................................
mb/google/brya: Set UART console
Follow latest schematic UART_PCH_DBG is UART 0.
BUG=b:174266035 TEST=Build Test
Signed-off-by: Eric Lai ericr_lai@compal.corp-partner.google.com Change-Id: I8e334fee1adcd79d058b7ab07127f8ecf1735202 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48070 Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/brya/Kconfig 1 file changed, 5 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index e448e18..4a9f2e1 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -3,6 +3,7 @@ select BOARD_ROMSIZE_KB_32768 select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES + select INTEL_LPSS_UART_FOR_CONSOLE select SOC_INTEL_ALDERLAKE
if BOARD_GOOGLE_BASEBOARD_BRYA @@ -31,4 +32,8 @@ string default "brya0" if BOARD_GOOGLE_BRYA0
+config UART_FOR_CONSOLE + int + default 0 + endif # BOARD_GOOGLE_BASEBOARD_BRYA
-
EricR Lai (Code Review) -
Tim Wawrzynczak (Code Review)