Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81210?usp=email )
Change subject: intelblocks/pmc: Assign initial values to pmc_gpe_init variables ......................................................................
intelblocks/pmc: Assign initial values to pmc_gpe_init variables
pmc_gpe_init uses soc_get_gpi_gpe_configs to initialize dw0, dw1 and dw2. dw0, dw1 and dw2 are uninitialized before calling soc_get_gpi_gpe_configs. This is error prone for some soc implementations where soc_get_gpi_gpe_configs does nothing.
This patch is simple, just to assign zero values to dw0, dw1 and dw0, to enhance the code robustness.
TEST=intel/archercity CRB
Signed-off-by: Gang Chen gang.c.chen@intel.com Change-Id: I8a710a2ac1482eed8c11977d51b187d834122d26 Reviewed-on: https://review.coreboot.org/c/coreboot/+/81210 Reviewed-by: Jérémy Compostella jeremy.compostella@intel.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/common/block/pmc/pmclib.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: Jérémy Compostella: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c index c58b3a4..054e731 100644 --- a/src/soc/intel/common/block/pmc/pmclib.c +++ b/src/soc/intel/common/block/pmc/pmclib.c @@ -581,7 +581,7 @@ { uint32_t gpio_cfg = 0; uint32_t gpio_cfg_reg; - uint8_t dw0, dw1, dw2; + uint8_t dw0 = 0, dw1 = 0, dw2 = 0;
/* Read PMC base address from soc. This is implemented in soc */ uintptr_t pmc_bar = soc_read_pmc_base();