Lijian Zhao (lijian.zhao@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14465
-gerrit
commit c069535568937cf7e2651c53a30f2076de70f92e Author: Andrey Petrov andrey.petrov@intel.com Date: Thu Apr 21 14:53:33 2016 -0700
soc/intel/apollolake: Actually include PCI IRQ definitions
Without PCI IRQ definitions kernel can't use most of the devices.
Change-Id: I3854781049851b5aa5b2dbf3257ece2fee76c3e2 Signed-off-by: Andrey Petrov andrey.petrov@intel.com --- src/soc/intel/apollolake/acpi/soc_int.asl | 1 + src/soc/intel/apollolake/acpi/southbridge.asl | 3 +++ 2 files changed, 4 insertions(+)
diff --git a/src/soc/intel/apollolake/acpi/soc_int.asl b/src/soc/intel/apollolake/acpi/soc_int.asl index 83a831f..7db23ee 100644 --- a/src/soc/intel/apollolake/acpi/soc_int.asl +++ b/src/soc/intel/apollolake/acpi/soc_int.asl @@ -51,6 +51,7 @@ #define SPI2_INT 37 #define UFS_INT 38 #define EMMC_INT 39 +#define PMC_INT 40 #define SDIO_INT 42
#endif /* _SOC_INT_DEFINE_ASL_ */ diff --git a/src/soc/intel/apollolake/acpi/southbridge.asl b/src/soc/intel/apollolake/acpi/southbridge.asl index cc52676..46d7013 100644 --- a/src/soc/intel/apollolake/acpi/southbridge.asl +++ b/src/soc/intel/apollolake/acpi/southbridge.asl @@ -17,3 +17,6 @@
/* LPSS device */ #include "lpss.asl" + +/* PCI IRQ assignment */ +#include "pci_irqs.asl"