Attention is currently required from: Angel Pons, Paul Menzel.
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79145?usp=email )
Change subject: sb/intel/bd82x6x/pch: Add method to identify PCH ......................................................................
Patch Set 3:
(4 comments)
File src/southbridge/intel/bd82x6x/pch.c:
https://review.coreboot.org/c/coreboot/+/79145/comment/8d5934a2_e2b9b10c : PS2, Line 47: {0x1C43, 0x1C47, 0x1C49, 0x1C4B, 0x1C4F, 0x1C41, : 0x1C4D, 0x1E42, 0x1E55, 0x1E5D, 0x1E57, 0x1E58, : 0x1E59, 0x1E43, 0x1E56};
nit: Format these values in 2 lines for CPT/PPT? I also sorted the IDs numerically. […]
Done
https://review.coreboot.org/c/coreboot/+/79145/comment/7ded8ef0_8de43b14 : PS2, Line 52: 1
true
Done
https://review.coreboot.org/c/coreboot/+/79145/comment/bb0f679a_1bf47301 : PS2, Line 53: 0
false
Done
https://review.coreboot.org/c/coreboot/+/79145/comment/f6f80160_7fa0199f : PS2, Line 14: int pch_silicon_revision(void) : { : static int pch_revision_id = -1; : : #ifdef __SIMPLE_DEVICE__ : pci_devfn_t dev = PCI_DEV(0, 0x1f, 0); : #else : struct device *dev = pcidev_on_root(0x1f, 0); : #endif : : if (pch_revision_id < 0) : pch_revision_id = pci_read_config8(dev, PCI_REVISION_ID); : return pch_revision_id; : } : : int pch_silicon_type(void) : { : static int pch_type = -1; : : #ifdef __SIMPLE_DEVICE__ : pci_devfn_t dev = PCI_DEV(0, 0x1f, 0); : #else : struct device *dev = pcidev_on_root(0x1f, 0); : #endif : : if (pch_type < 0) : pch_type = pci_read_config8(dev, PCI_DEVICE_ID + 1); : return pch_type; : } : : bool pch_is_mobile(void) : { : const u16 devid = pci_s_read_config16(PCH_LPC_DEV, PCI_DEVICE_ID); : const u16 devids[] = {0x1C43, 0x1C47, 0x1C49, 0x1C4B, 0x1C4F, 0x1C41, : 0x1C4D, 0x1E42, 0x1E55, 0x1E5D, 0x1E57, 0x1E58, : 0x1E59, 0x1E43, 0x1E56}; : for (size_t i = 0; i < ARRAY_SIZE(devids); i++) : if (devid == devids[i]) : return 1; : return 0; : }
Maybe these functions should be in a separate file, so that `__SIMPLE_DEVICE__` is not a problem?
My plan was to revive https://review.coreboot.org/c/coreboot/+/49167 after this is merged.