Rex-BC Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59943 )
Change subject: mb/google/corsola: Configure TPM ......................................................................
mb/google/corsola: Configure TPM
Initialize SPI bus 2 for TPM control.
TEST=build pass BUG=b:202871018
Signed-off-by: Rex-BC Chen rex-bc.chen@mediatek.com Change-Id: I8ede68d6eb594890195e8464151c1c0f88aeee43 --- M src/mainboard/google/corsola/Kconfig M src/mainboard/google/corsola/bootblock.c M src/mainboard/google/corsola/chromeos.c 3 files changed, 14 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/59943/1
diff --git a/src/mainboard/google/corsola/Kconfig b/src/mainboard/google/corsola/Kconfig index 2a935f3..8877f2f 100644 --- a/src/mainboard/google/corsola/Kconfig +++ b/src/mainboard/google/corsola/Kconfig @@ -24,6 +24,8 @@ select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_BOARDID select EC_GOOGLE_CHROMEEC_SPI + select MAINBOARD_HAS_SPI_TPM_CR50 if VBOOT + select MAINBOARD_HAS_TPM2 if VBOOT
config MAINBOARD_DIR string @@ -43,6 +45,10 @@ bool default n
+config DRIVER_TPM_SPI_BUS + hex + default 0x2 + config EC_GOOGLE_CHROMEEC_SPI_BUS hex default 0x1 diff --git a/src/mainboard/google/corsola/bootblock.c b/src/mainboard/google/corsola/bootblock.c index d742074..ea36fed 100644 --- a/src/mainboard/google/corsola/bootblock.c +++ b/src/mainboard/google/corsola/bootblock.c @@ -9,6 +9,8 @@ void bootblock_mainboard_init(void) { mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 3 * MHz, 0); + mtk_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, SPI_PAD0_MASK, 1 * MHz, 0); mtk_snfc_init(SPI_NOR_GPIO_SET0); setup_chromeos_gpios(); + gpio_eint_configure(GPIO_GSC_AP_INT, IRQ_TYPE_EDGE_RISING); } diff --git a/src/mainboard/google/corsola/chromeos.c b/src/mainboard/google/corsola/chromeos.c index 84023b7..847569e 100644 --- a/src/mainboard/google/corsola/chromeos.c +++ b/src/mainboard/google/corsola/chromeos.c @@ -3,6 +3,7 @@ #include <bootmode.h> #include <boot/coreboot_tables.h> #include <gpio.h> +#include <security/tpm/tis.h>
#include "gpio.h"
@@ -32,3 +33,8 @@ /* EC is trusted if not in RW. This is active low. */ return !!gpio_get(GPIO_EC_IN_RW); } + +int tis_plat_irq_status(void) +{ + return gpio_eint_poll(GPIO_GSC_AP_INT); +}