Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Fred Reitberger, Felix Held. Hello Jason Glenesk, Raul Rangel, Marshall Dawson, Fred Reitberger, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/64868
to look at the new patch set (#3).
Change subject: soc/amd/*: Make mtrr decision based on syscfg ......................................................................
soc/amd/*: Make mtrr decision based on syscfg
The syscfg has to option to automatically mark the range between 4G and TOM2, which contains DRAM, as WB. Making it generally not necessary to allocate MTRRs for memory above 4G if no PCI BARs are placed up there.
Change-Id: Ifbacae28e272ab2f39f268ad034354a9c590d035 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/amd/cezanne/cpu.c M src/soc/amd/picasso/cpu.c M src/soc/amd/sabrina/cpu.c M src/soc/amd/stoneyridge/cpu.c 4 files changed, 41 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/64868/3