Evgeny Zinoviev has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Documentation: Add GM45 ThinkPads common page
- Add a common page about X200/T400/T500 ThinkPads. - Describe how to remove ME on these models. - Describe default flash layouts.
Change-Id: I85917821efe63fff4b933b6226e99c17b63eb1b9 Signed-off-by: Evgeny Zinoviev me@ch1p.io --- M Documentation/mainboard/index.md A Documentation/mainboard/lenovo/xx00_series.md 2 files changed, 115 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/38926/1
diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md index ce30ee2..3b5903b 100644 --- a/Documentation/mainboard/index.md +++ b/Documentation/mainboard/index.md @@ -77,6 +77,7 @@
### GM45 series
+- [X200 / T400 / T500 common](lenovo/xx00_series.md) - [X301](lenovo/x301.md)
### Sandy Bridge series diff --git a/Documentation/mainboard/lenovo/xx00_series.md b/Documentation/mainboard/lenovo/xx00_series.md new file mode 100644 index 0000000..3ac7c87 --- /dev/null +++ b/Documentation/mainboard/lenovo/xx00_series.md @@ -0,0 +1,114 @@ +# Lenovo X200 / T400 / T500 common + +These models can have 8 MB or 4 MB flash chip installed. You can identify the +chip in your machine through flashrom: +``` +flashrom -p internal +``` + +## Installing without ME firmware + +On GM45 machines it's possible to disable and remove ME by modifying the flash +descriptor. This also make it possible to use the flash region the ME used for +`bios` region, allowing for much larger payloads. + +First of all create a backup of your ROM with an external programmer: +``` +flashrom -p YOUR_PROGRAMMER -r backup.rom +``` + +Then extract FD modules to a separate files. Your will need +`flashregion_3_gbe.bin` later. +``` +ifdtool -x backup.rom +``` + +There is a tool to generate modified flash descriptor called **bincfg**. Go to +`util/bincfg` and build it: +``` +cd util/bincfg +make +``` + +If your flash is 4 MB, edit the `ifd-x200.set` file as shown: + +```diff +diff --git a/util/blobtool/ifd-x200.set b/util/blobtool/ifd-x200.set +--- a/util/blobtool/ifd-x200.set ++++ b/util/blobtool/ifd-x200.set +@@ -35,7 +35,7 @@ + "flmap2_msl" = 0x1, + "flmap2_reserved" = 0x0, + +- "flcomp_density1" = 0x4, ++ "flcomp_density1" = 0x3, + "flcomp_density2" = 0x2, + "flcomp_reserved0" = 0x0, + "flcomp_reserved1" = 0x0, +@@ -56,7 +56,7 @@ + "flreg0_reserved1" = 0x0, + "flreg1_base" = 0x3, + "flreg1_reserved0" = 0x0, +- "flreg1_limit" = 0x7ff, ++ "flreg1_limit" = 0x3ff, + "flreg1_reserved1" = 0x0, + "flreg2_base" = 0x1fff, + "flreg2_reserved0" = 0x0, +``` + +Create the flash descriptor: +``` +./bincfg ifd-x200.spec ifd-x200.set ifd.bin +``` + +Now configure coreboot. You need to select correct chip size and specify paths +to flash descriptor and gbe dump. +``` +Mainboard ---> + ROM chip size (8192 KB (8 MB)) # According to your chip + (0x7fd000) Size of CBFS filesystem in ROM # or 0x3fd000 for 4 MB chip + +Chipset ---> + [*] Add Intel descriptor.bin file + (/path/to/util/bincfg/ifd.bin) Path and filename of the descriptor.bin file + + [*] Add gigabit ethernet configuration + (/path/to/flashregion_3_gbe.bin) Path to gigabit ethernet configuration +``` + +Then build coreboot and flash whole `build/coreboot.rom` to the chip. + +## Installing with ME firmware + +To install coreboot and keep ME, you don't need to do anything special. Just +flash only `bios` and don't touch other regions: +``` +flashrom -p YOUR_PROGRAMMER -w coreboot.rom --ifd -i bios +``` + +## Flash layout + +The flash layout of the OEM firmware on 8 MB chips is as follows: +``` +00000000:00000fff descriptor +00001000:005f5fff me +005f6000:005f7fff gbe +005f8000:005fffff platform +00600000:007fffff bios +00690000:006affff ec +007e0000:007fffff bootblock +``` + +On 4 MB chips: +``` +00000000:00000fff descriptor +00001000:001f5fff me +001f6000:001f7fff gbe +001f8000:001fffff platform +00200000:003fffff bios +00290000:002affff ec +003e0000:003fffff bootblock +``` + +The `ec` region is not where EC firmware is stored. It's where EC firmware +updates are stored for PhoenixBIOS to write them to EC once.
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38926
to look at the new patch set (#2).
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Documentation: Add GM45 ThinkPads common page
- Add a common page about X200/T400/T500 ThinkPads. - Describe how to disable ME and remove it's firmware on these models. - Describe default flash layouts.
Change-Id: I85917821efe63fff4b933b6226e99c17b63eb1b9 Signed-off-by: Evgeny Zinoviev me@ch1p.io --- M Documentation/mainboard/index.md A Documentation/mainboard/lenovo/xx00_series.md 2 files changed, 115 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/38926/2
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38926
to look at the new patch set (#3).
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Documentation: Add GM45 ThinkPads common page
- Add a common page about X200/T400/T500 ThinkPads. - Describe how to disable ME and remove it's firmware on these models. - Describe default flash layouts.
Thanks to swiftgeek for his help when writing this, especially the last paragraph.
Change-Id: I85917821efe63fff4b933b6226e99c17b63eb1b9 Signed-off-by: Evgeny Zinoviev me@ch1p.io --- M Documentation/mainboard/index.md A Documentation/mainboard/lenovo/xx00_series.md 2 files changed, 146 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/38926/3
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38926
to look at the new patch set (#4).
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Documentation: Add GM45 ThinkPads common page
- Add a common page about GM45 ThinkPads. - Describe how to disable ME and remove it's firmware on these models. - Describe default flash layouts.
Thanks to swiftgeek for his help when writing this, especially the last paragraph.
Change-Id: I85917821efe63fff4b933b6226e99c17b63eb1b9 Signed-off-by: Evgeny Zinoviev me@ch1p.io --- M Documentation/mainboard/index.md A Documentation/mainboard/lenovo/xx00_series.md 2 files changed, 146 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/38926/4
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Patch Set 4:
(3 comments)
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/ind... File Documentation/mainboard/index.md:
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/ind... PS4, Line 80: xx00_series.md Please don't use this naming scheme. I introduced it, but it's too confusing. I'll send a patch series to clean that.
Please name it intel_gm45_series.md or similar.
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/len... File Documentation/mainboard/lenovo/xx00_series.md:
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/len... PS4, Line 1: T400 This tutorial only works on x200
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/len... PS4, Line 27: `util/bincfg` Why don't you use ifdtool? That would work for all GM45 models.
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38926
to look at the new patch set (#5).
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Documentation: Add GM45 ThinkPads common page
- Add a common page about GM45 ThinkPads. - Describe how to disable ME and remove it's firmware on these models. - Describe default flash layouts.
Thanks to swiftgeek for his help when writing this, especially the last paragraph and flash layouts.
Change-Id: I85917821efe63fff4b933b6226e99c17b63eb1b9 Signed-off-by: Evgeny Zinoviev me@ch1p.io --- M Documentation/mainboard/index.md A Documentation/mainboard/lenovo/montevina_series.md 2 files changed, 146 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/38926/5
Evgeny Zinoviev has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Patch Set 5:
(3 comments)
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/ind... File Documentation/mainboard/index.md:
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/ind... PS4, Line 80: xx00_series.md
Please don't use this naming scheme. I introduced it, but it's too confusing. […]
What about montevina?
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/len... File Documentation/mainboard/lenovo/xx00_series.md:
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/len... PS4, Line 1: T400
This tutorial only works on x200
Why? They use the same design, and I flashed T400 and T500 using ifd generated with the same ifd-x200.set file. It's the name of the file that might be confusing.
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/len... PS4, Line 27: `util/bincfg`
Why don't you use ifdtool? That would work for all GM45 models.
How to use ifdtool for that?
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Patch Set 5:
(3 comments)
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/ind... File Documentation/mainboard/index.md:
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/ind... PS4, Line 80: xx00_series.md
What about montevina?
Sounds good
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/len... File Documentation/mainboard/lenovo/xx00_series.md:
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/len... PS4, Line 1: T400
Why? They use the same design, and I flashed T400 and T500 using ifd generated with the same ifd-x20 […]
Is it 100% identical? I could imagine that devices with a dGPU have a different IFD.
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/len... PS4, Line 27: `util/bincfg`
How to use ifdtool for that?
Described in CB:38832
Evgeny Zinoviev has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/len... File Documentation/mainboard/lenovo/xx00_series.md:
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/len... PS4, Line 27: `util/bincfg`
Described in CB:38832
But you can't change specific bits with it, can you?
Evgeny Zinoviev has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/len... File Documentation/mainboard/lenovo/xx00_series.md:
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/len... PS4, Line 1: T400
Is it 100% identical? I could imagine that devices with a dGPU have a different IFD.
Yes. The only exception is R500. It doesn't have gbe and probably needs another commit to support it in bincfg...
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/len... File Documentation/mainboard/lenovo/xx00_series.md:
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/len... PS4, Line 27: `util/bincfg`
But you can't change specific bits with it, can you?
It allows patching the IFD, which means that it changes specific bits.
Evgeny Zinoviev has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Patch Set 6:
This change is ready for review.
Evgeny Zinoviev has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/len... File Documentation/mainboard/lenovo/xx00_series.md:
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/len... PS4, Line 27: `util/bincfg`
It allows patching the IFD, which means that it changes specific bits.
Documented both methods.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Patch Set 6: Code-Review+1
(3 comments)
Nice. Thank you for documenting these devices.
https://review.coreboot.org/c/coreboot/+/38926/6//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38926/6//COMMIT_MSG@10 PS6, Line 10: it's its
https://review.coreboot.org/c/coreboot/+/38926/6//COMMIT_MSG@9 PS6, Line 9: - Add a common page about GM45 ThinkPads. : - Describe how to disable ME and remove it's firmware : on these models. : - Describe default flash layouts. : : Thanks to swiftgeek for his help when writing this, : especially the last paragraph and flash layouts. 75 characters per line are allowed.
https://review.coreboot.org/c/coreboot/+/38926/6/Documentation/mainboard/len... File Documentation/mainboard/lenovo/montevina_series.md:
https://review.coreboot.org/c/coreboot/+/38926/6/Documentation/mainboard/len... PS6, Line 17: it's its
Hello Paul Menzel, build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38926
to look at the new patch set (#7).
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Documentation: Add GM45 ThinkPads common page
- Add a common page about GM45 ThinkPads. - Describe how to disable ME and remove its firmware on these models. - Describe vendor flash layouts.
Thanks to swiftgeek for his help when writing this, especially the last paragraph and flash layouts.
Change-Id: I85917821efe63fff4b933b6226e99c17b63eb1b9 Signed-off-by: Evgeny Zinoviev me@ch1p.io --- M Documentation/mainboard/index.md A Documentation/mainboard/lenovo/montevina_series.md 2 files changed, 161 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/38926/7
Hello Paul Menzel, build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38926
to look at the new patch set (#8).
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Documentation: Add GM45 ThinkPads common page
- Add a common page about GM45 ThinkPads. - Describe how to disable ME and remove its firmware on these models. - Describe vendor flash layouts.
Thanks to swiftgeek for his help when writing this, especially the last paragraph and flash layouts.
Change-Id: I85917821efe63fff4b933b6226e99c17b63eb1b9 Signed-off-by: Evgeny Zinoviev me@ch1p.io --- M Documentation/mainboard/index.md A Documentation/mainboard/lenovo/montevina_series.md 2 files changed, 161 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/38926/8
Evgeny Zinoviev has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Patch Set 8:
(3 comments)
https://review.coreboot.org/c/coreboot/+/38926/6//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38926/6//COMMIT_MSG@10 PS6, Line 10: it's
its
Done
https://review.coreboot.org/c/coreboot/+/38926/6//COMMIT_MSG@9 PS6, Line 9: - Add a common page about GM45 ThinkPads. : - Describe how to disable ME and remove it's firmware : on these models. : - Describe default flash layouts. : : Thanks to swiftgeek for his help when writing this, : especially the last paragraph and flash layouts.
75 characters per line are allowed.
Are you sure about 75? Usually it's 72.
https://review.coreboot.org/c/coreboot/+/38926/6/Documentation/mainboard/len... File Documentation/mainboard/lenovo/montevina_series.md:
https://review.coreboot.org/c/coreboot/+/38926/6/Documentation/mainboard/len... PS6, Line 17: it's
its
Done
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Patch Set 8: Code-Review+1
(9 comments)
https://review.coreboot.org/c/coreboot/+/38926/8/Documentation/mainboard/len... File Documentation/mainboard/lenovo/montevina_series.md:
https://review.coreboot.org/c/coreboot/+/38926/8/Documentation/mainboard/len... PS8, Line 3: MB flash chip sizes are multiples of 1024, not 1000: s/MB/MiB/g
https://review.coreboot.org/c/coreboot/+/38926/8/Documentation/mainboard/len... PS8, Line 4: chip in your machine through flashrom: Note that this does not allow you to determine whether the chip is in a SOIC-8 or a SOIC-16 package.
https://review.coreboot.org/c/coreboot/+/38926/8/Documentation/mainboard/len... PS8, Line 18: make make*s*
https://review.coreboot.org/c/coreboot/+/38926/8/Documentation/mainboard/len... PS8, Line 26: Then extract FD modules to a separate files I would reword this a bit:
Then, split the IFD regions into separate filse with ifdtool.
https://review.coreboot.org/c/coreboot/+/38926/8/Documentation/mainboard/len... PS8, Line 26: Your You
https://review.coreboot.org/c/coreboot/+/38926/8/Documentation/mainboard/len... PS8, Line 78: Creating new Creating *a* new
https://review.coreboot.org/c/coreboot/+/38926/8/Documentation/mainboard/len... PS8, Line 80: generate modified generate *a* modified
https://review.coreboot.org/c/coreboot/+/38926/8/Documentation/mainboard/len... PS8, Line 129: touch other touch *any* other
https://review.coreboot.org/c/coreboot/+/38926/8/Documentation/mainboard/len... PS8, Line 129: with flash with *the* flash
(and it's actually "firmware descriptor", but it's not really a big deal)
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Patch Set 8:
(2 comments)
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/len... File Documentation/mainboard/lenovo/xx00_series.md:
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/len... PS4, Line 1: T400
Yes. The only exception is R500. […]
That a device has a dGPU does not necessarily mean that the firmware descriptor changes. The GbE is more relevant.
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/len... PS4, Line 27: `util/bincfg`
Documented both methods.
Done, I think?
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Patch Set 8:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38926/6//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38926/6//COMMIT_MSG@9 PS6, Line 9: - Add a common page about GM45 ThinkPads. : - Describe how to disable ME and remove it's firmware : on these models. : - Describe default flash layouts. : : Thanks to swiftgeek for his help when writing this, : especially the last paragraph and flash layouts.
Are you sure about 75? Usually it's 72.
If in doubt, gerrit's UI allows editing a commit message, and the default box size is a good reference.
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Patch Set 8:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38926/6//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38926/6//COMMIT_MSG@9 PS6, Line 9: - Add a common page about GM45 ThinkPads. : - Describe how to disable ME and remove it's firmware : on these models. : - Describe default flash layouts. : : Thanks to swiftgeek for his help when writing this, : especially the last paragraph and flash layouts.
If in doubt, gerrit's UI allows editing a commit message, and the default box size is a good referen […]
Somebody wrote 75 into the coreboot wiki, and now it's read-only ;) Anyway, it's just a maximum, so this commit message is already perfectly formatted.
Gerrit (and other tools) assume 72 chars.
Hello Angel Pons, Paul Menzel, build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38926
to look at the new patch set (#9).
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Documentation: Add GM45 ThinkPads common page
- Add a common page about GM45 ThinkPads. - Describe how to disable ME and remove its firmware on these models. - Describe vendor flash layouts.
Thanks to swiftgeek for his help when writing this, especially the last paragraph and flash layouts.
Change-Id: I85917821efe63fff4b933b6226e99c17b63eb1b9 Signed-off-by: Evgeny Zinoviev me@ch1p.io --- M Documentation/mainboard/index.md A Documentation/mainboard/lenovo/montevina_series.md 2 files changed, 164 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/38926/9
Evgeny Zinoviev has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add GM45 ThinkPads common page ......................................................................
Patch Set 8:
(11 comments)
https://review.coreboot.org/c/coreboot/+/38926/6//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38926/6//COMMIT_MSG@9 PS6, Line 9: - Add a common page about GM45 ThinkPads. : - Describe how to disable ME and remove it's firmware : on these models. : - Describe default flash layouts. : : Thanks to swiftgeek for his help when writing this, : especially the last paragraph and flash layouts.
If in doubt, gerrit's UI allows editing a commit message, and the default box size is a good referen […]
Done
https://review.coreboot.org/c/coreboot/+/38926/8/Documentation/mainboard/len... File Documentation/mainboard/lenovo/montevina_series.md:
https://review.coreboot.org/c/coreboot/+/38926/8/Documentation/mainboard/len... PS8, Line 3: MB
flash chip sizes are multiples of 1024, not 1000: s/MB/MiB/g
Done
https://review.coreboot.org/c/coreboot/+/38926/8/Documentation/mainboard/len... PS8, Line 4: chip in your machine through flashrom:
Note that this does not allow you to determine whether the chip is in a SOIC-8 or a SOIC-16 package.
Sounds good.
https://review.coreboot.org/c/coreboot/+/38926/8/Documentation/mainboard/len... PS8, Line 18: make
make*s*
Done
https://review.coreboot.org/c/coreboot/+/38926/8/Documentation/mainboard/len... PS8, Line 26: Your
You
Done
https://review.coreboot.org/c/coreboot/+/38926/8/Documentation/mainboard/len... PS8, Line 26: Then extract FD modules to a separate files
I would reword this a bit: […]
Done
https://review.coreboot.org/c/coreboot/+/38926/8/Documentation/mainboard/len... PS8, Line 78: Creating new
Creating *a* new
Done
https://review.coreboot.org/c/coreboot/+/38926/8/Documentation/mainboard/len... PS8, Line 80: generate modified
generate *a* modified
Done
https://review.coreboot.org/c/coreboot/+/38926/8/Documentation/mainboard/len... PS8, Line 129: touch other
touch *any* other
Done
https://review.coreboot.org/c/coreboot/+/38926/8/Documentation/mainboard/len... PS8, Line 129: with flash
with *the* flash […]
Done
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/len... File Documentation/mainboard/lenovo/xx00_series.md:
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/len... PS4, Line 1: T400
That a device has a dGPU does not necessarily mean that the firmware descriptor changes. […]
Done
Hello Angel Pons, Paul Menzel, build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38926
to look at the new patch set (#10).
Change subject: Documentation: Add Montevina ThinkPads common page ......................................................................
Documentation: Add Montevina ThinkPads common page
- Add a common page about Montevina ThinkPads. - Describe how to disable ME and remove its firmware on these models. - Describe vendor flash layouts.
Thanks to swiftgeek for his help when writing this, especially the last paragraph and flash layouts.
Change-Id: I85917821efe63fff4b933b6226e99c17b63eb1b9 Signed-off-by: Evgeny Zinoviev me@ch1p.io --- M Documentation/mainboard/index.md A Documentation/mainboard/lenovo/montevina_series.md 2 files changed, 165 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/38926/10
Swift Geek (Sebastian Grzywna) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add Montevina ThinkPads common page ......................................................................
Patch Set 10: Code-Review+1
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add Montevina ThinkPads common page ......................................................................
Patch Set 10: Code-Review+1
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add Montevina ThinkPads common page ......................................................................
Patch Set 10: Code-Review+2
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add Montevina ThinkPads common page ......................................................................
Patch Set 10:
(3 comments)
https://review.coreboot.org/c/coreboot/+/38926/10/Documentation/mainboard/le... File Documentation/mainboard/lenovo/montevina_series.md:
https://review.coreboot.org/c/coreboot/+/38926/10/Documentation/mainboard/le... PS10, Line 53: 001fffff 01ffffff
https://review.coreboot.org/c/coreboot/+/38926/10/Documentation/mainboard/le... PS10, Line 106: $ ./bincfg ifd-x200.spec ifd-x200.set ifd.bin There were concerns in the past that this .set file might not contain correct settings for other models. Did somebody check that? should we warn here?
https://review.coreboot.org/c/coreboot/+/38926/10/Documentation/mainboard/le... PS10, Line 117: 0x1fd000 0x1ffd000
Swift Geek (Sebastian Grzywna) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add Montevina ThinkPads common page ......................................................................
Patch Set 10:
R500/waikiki-3 is the sole different one when it comes to a descriptor
Hello Patrick Rudolph, Swift Geek (Sebastian Grzywna), Angel Pons, Paul Menzel, build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38926
to look at the new patch set (#11).
Change subject: Documentation: Add Montevina ThinkPads common page ......................................................................
Documentation: Add Montevina ThinkPads common page
- Add a common page about Montevina ThinkPads. - Describe how to disable ME and remove its firmware on these models. - Describe vendor flash layouts.
Thanks to swiftgeek for his help when writing this, especially the last paragraph and flash layouts.
Change-Id: I85917821efe63fff4b933b6226e99c17b63eb1b9 Signed-off-by: Evgeny Zinoviev me@ch1p.io --- M Documentation/mainboard/index.md A Documentation/mainboard/lenovo/montevina_series.md 2 files changed, 165 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/38926/11
Evgeny Zinoviev has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add Montevina ThinkPads common page ......................................................................
Patch Set 11:
(3 comments)
https://review.coreboot.org/c/coreboot/+/38926/10/Documentation/mainboard/le... File Documentation/mainboard/lenovo/montevina_series.md:
https://review.coreboot.org/c/coreboot/+/38926/10/Documentation/mainboard/le... PS10, Line 53: 001fffff
01ffffff
Oops. Thank you.
https://review.coreboot.org/c/coreboot/+/38926/10/Documentation/mainboard/le... PS10, Line 106: $ ./bincfg ifd-x200.spec ifd-x200.set ifd.bin
There were concerns in the past that this .set file might not contain […]
It works on T400 and T500 for sure. R500 is known to be the only different (and I mention it on the page)
https://review.coreboot.org/c/coreboot/+/38926/10/Documentation/mainboard/le... PS10, Line 117: 0x1fd000
0x1ffd000
Done
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add Montevina ThinkPads common page ......................................................................
Patch Set 11: Code-Review+1
(2 comments)
https://review.coreboot.org/c/coreboot/+/38926/10/Documentation/mainboard/le... File Documentation/mainboard/lenovo/montevina_series.md:
https://review.coreboot.org/c/coreboot/+/38926/10/Documentation/mainboard/le... PS10, Line 53: 001fffff
Oops. Thank you.
Done
https://review.coreboot.org/c/coreboot/+/38926/10/Documentation/mainboard/le... PS10, Line 106: $ ./bincfg ifd-x200.spec ifd-x200.set ifd.bin
It works on T400 and T500 for sure. […]
Ack
Evgeny Zinoviev has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add Montevina ThinkPads common page ......................................................................
Patch Set 11:
(2 comments)
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/ind... File Documentation/mainboard/index.md:
https://review.coreboot.org/c/coreboot/+/38926/4/Documentation/mainboard/ind... PS4, Line 80: xx00_series.md
Sounds good
Done
https://review.coreboot.org/c/coreboot/+/38926/8/Documentation/mainboard/len... File Documentation/mainboard/lenovo/montevina_series.md:
https://review.coreboot.org/c/coreboot/+/38926/8/Documentation/mainboard/len... PS8, Line 4: chip in your machine through flashrom:
Sounds good.
Done
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add Montevina ThinkPads common page ......................................................................
Patch Set 11: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add Montevina ThinkPads common page ......................................................................
Patch Set 11: Code-Review+1
(1 comment)
One last thing
https://review.coreboot.org/c/coreboot/+/38926/11/Documentation/mainboard/le... File Documentation/mainboard/lenovo/montevina_series.md:
https://review.coreboot.org/c/coreboot/+/38926/11/Documentation/mainboard/le... PS11, Line 121: specity specify
Hello build bot (Jenkins), Nico Huber, Paul Menzel, Angel Pons, Patrick Rudolph, Swift Geek (Sebastian Grzywna),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38926
to look at the new patch set (#12).
Change subject: Documentation: Add Montevina ThinkPads common page ......................................................................
Documentation: Add Montevina ThinkPads common page
- Add a common page about Montevina ThinkPads. - Describe how to disable ME and remove its firmware on these models. - Describe vendor flash layouts.
Thanks to swiftgeek for his help when writing this, especially the last paragraph and flash layouts.
Change-Id: I85917821efe63fff4b933b6226e99c17b63eb1b9 Signed-off-by: Evgeny Zinoviev me@ch1p.io --- M Documentation/mainboard/index.md A Documentation/mainboard/lenovo/montevina_series.md 2 files changed, 165 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/38926/12
Evgeny Zinoviev has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add Montevina ThinkPads common page ......................................................................
Patch Set 12:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38926/11/Documentation/mainboard/le... File Documentation/mainboard/lenovo/montevina_series.md:
https://review.coreboot.org/c/coreboot/+/38926/11/Documentation/mainboard/le... PS11, Line 121: specity
specify
Done
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add Montevina ThinkPads common page ......................................................................
Patch Set 12: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38926 )
Change subject: Documentation: Add Montevina ThinkPads common page ......................................................................
Documentation: Add Montevina ThinkPads common page
- Add a common page about Montevina ThinkPads. - Describe how to disable ME and remove its firmware on these models. - Describe vendor flash layouts.
Thanks to swiftgeek for his help when writing this, especially the last paragraph and flash layouts.
Change-Id: I85917821efe63fff4b933b6226e99c17b63eb1b9 Signed-off-by: Evgeny Zinoviev me@ch1p.io Reviewed-on: https://review.coreboot.org/c/coreboot/+/38926 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M Documentation/mainboard/index.md A Documentation/mainboard/lenovo/montevina_series.md 2 files changed, 165 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md index 126a8fb..e46e0f3 100644 --- a/Documentation/mainboard/index.md +++ b/Documentation/mainboard/index.md @@ -77,6 +77,7 @@
### GM45 series
+- [X200 / T400 / T500 / X301 common](lenovo/montevina_series.md) - [X301](lenovo/x301.md)
### Sandy Bridge series diff --git a/Documentation/mainboard/lenovo/montevina_series.md b/Documentation/mainboard/lenovo/montevina_series.md new file mode 100644 index 0000000..ab858a6 --- /dev/null +++ b/Documentation/mainboard/lenovo/montevina_series.md @@ -0,0 +1,164 @@ +# Lenovo X200 / T400 / T500 / X301 common + +These models are sold with either 8 MiB or 4 MiB flash chip. You can identify +the chip in your machine through flashrom: +```console +# flashrom -p internal +``` + +Note that this does not allow you to determine whether the chip is in a SOIC-8 +or a SOIC-16 package. + +## Installing without ME firmware + +```eval_rst +.. Note:: + **ThinkPad R500** has slightly different flash layout (it doesn't have + ``gbe`` region), so the process would be a little different for that model. +``` + +On Montevina machines it's possible to disable ME and remove its firmware from +SPI flash by modifying the flash descriptor. This also makes it possible to use +the flash region the ME used for `bios` region, allowing for much larger +payloads. + +First of all create a backup of your ROM with an external programmer: +```console +# flashrom -p YOUR_PROGRAMMER -r backup.rom +``` + +Then, split the IFD regions into separate filse with ifdtool. You will need +`flashregion_3_gbe.bin` later. +```console +$ ifdtool -x backup.rom +``` + +Now you need to patch the flash descriptor. You can either [modify the one from +your backup with **ifdtool**](#modifying-flash-descriptor-using-ifdtool), or +[generate a completely new one with **bincfg**](#creating-a-new-flash-descriptor-using-bincfg). + +#### Modifying flash descriptor using ifdtool + +Pick the layout according to your chip size from the table below and save it to +the `new_layout.txt` file: + +```eval_rst ++---------------------------+---------------------------+---------------------------+ +| 4 MB chip | 8 MB chip | 16 MB chip | ++===========================+===========================+===========================+ +| .. code-block:: none | .. code-block:: none | .. code-block:: none | +| | | | +| 00000000:00000fff fd | 00000000:00000fff fd | 00000000:00000fff fd | +| 00001000:00002fff gbe | 00001000:00002fff gbe | 00001000:00002fff gbe | +| 00003000:003fffff bios | 00003000:007fffff bios | 00003000:01ffffff bios | +| 00fff000:00000fff pd | 00fff000:00000fff pd | 00fff000:00000fff pd | +| 00fff000:00000fff me | 00fff000:00000fff me | 00fff000:00000fff me | ++---------------------------+---------------------------+---------------------------+ +``` + +The last two lines define `pd` and `me` regions of negative size. This way +ifdtool will mark those as unused. + +Update regions in the flash descrpitor (it was extracted previously with +`ifdtool -x`): +```console +$ ifdtool -n new_layout.txt flashregion_0_flashdescriptor.bin +``` + +Set `MeDisable` bit in ICH0 and MCH0 straps: +```console +$ ifdtool -M 1 flashregion_0_flashdescriptor.bin.new +``` + +Delete previous descriptors and rename the final one: +```console +$ rm flashregion_0_flashdescriptor.bin +$ rm flashregion_0_flashdescriptor.bin.new +$ mv flashregion_0_flashdescriptor.bin.new.new flashregion_0_flashdescriptor.bin +``` + +Continue to the [Configuring coreboot](#configuring-coreboot) section. + +#### Creating a new flash descriptor using bincfg + +There is a tool to generate a modified flash descriptor called **bincfg**. Go to +`util/bincfg` and build it: +```console +$ cd util/bincfg +$ make +``` + +If your flash is not 8 MB, you need to change values of `flcomp_density1` and +`flreg1_limit` in the ifd-x200.set file according to following table: + +```eval_rst ++-----------------+-------+-------+--------+ +| | 4 MB | 8 MB | 16 MB | ++=================+=======+=======+========+ +| flcomp_density1 | 0x3 | 0x4 | 0x5 | ++-----------------+-------+-------+--------+ +| flreg1_limit | 0x3ff | 0x7ff | 0x1fff | ++-----------------+-------+-------+--------+ +``` + +Then create the flash descriptor: +```console +$ ./bincfg ifd-x200.spec ifd-x200.set ifd.bin +``` + +#### Configuring coreboot + +Now configure coreboot. You need to select correct chip size and specify paths +to flash descriptor and gbe dump. + +``` +Mainboard ---> + ROM chip size (8192 KB (8 MB)) # According to your chip + (0x7fd000) Size of CBFS filesystem in ROM # or 0x3fd000 for 4 MB chip / 0x1ffd000 for 16 MB chip + +Chipset ---> + [*] Add Intel descriptor.bin file + # Note: if you used bincfg, specify path to generated util/bincfg/ifd.bin + (/path/to/flashregion_0_flashdescriptor.bin) Path and filename of the descriptor.bin file + + [*] Add gigabit ethernet configuration + (/path/to/flashregion_3_gbe.bin) Path to gigabit ethernet configuration +``` + +Then build coreboot and flash whole `build/coreboot.rom` to the chip. + +## Installing with ME firmware + +To install coreboot and keep ME working, you don't need to do anything special +with the flash descriptor. Just flash only `bios` externally and don't touch any +other regions: +```console +# flashrom -p YOUR_PROGRAMMER -w coreboot.rom --ifd -i bios +``` + +## Flash layout + +The flash layouts of the OEM firmware are as follows: + +```eval_rst ++---------------------------------+---------------------------------+ +| 4 MB chip | 8 MB chip | ++=================================+=================================+ +| .. code-block:: none | .. code-block:: none | +| | | +| 00000000:00000fff fd | 00000000:00000fff fd | +| 00001000:001f5fff me | 00001000:005f5fff me | +| 001f6000:001f7fff gbe | 005f6000:005f7fff gbe | +| 001f8000:001fffff pd | 005f8000:005fffff pd | +| 00200000:003fffff bios | 00600000:007fffff bios | +| 00290000:002affff ec | 00690000:006affff ec | +| 003e0000:003fffff bootblock | 007e0000:007fffff bootblock | ++---------------------------------+---------------------------------+ +``` + +On each boot of vendor BIOS `ec` area in flash is checked for having firmware +there, and if there is one, it proceedes to update firmware on H8S/2116 (when +both external power and main battery are attached). Once update is performed, +first 64 KB of `ec` area is erased. Visit +[thinkpad-ec repository](https://github.com/hamishcoleman/thinkpad-ec) to learn +more about how to extract EC firmware from vendor updates.
-
Angel Pons (Code Review) -
Evgeny Zinoviev (Code Review)
-
Nico Huber (Code Review)
-
Patrick Georgi (Code Review)
-
Patrick Rudolph (Code Review)
-
Paul Menzel (Code Review)
-
Swift Geek (Sebastian Grzywna) (Code Review)