Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36166 )
Change subject: soc/intel/common: Don't link CAR teardown in romstage ......................................................................
soc/intel/common: Don't link CAR teardown in romstage
This is done in postcar stage.
Change-Id: I0ff1624c20b9649ca0a8fa31c342bf99530076d7 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/common/block/cpu/Makefile.inc 1 file changed, 0 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/36166/1
diff --git a/src/soc/intel/common/block/cpu/Makefile.inc b/src/soc/intel/common/block/cpu/Makefile.inc index a6c4f37..857bf0f 100644 --- a/src/soc/intel/common/block/cpu/Makefile.inc +++ b/src/soc/intel/common/block/cpu/Makefile.inc @@ -3,7 +3,6 @@ bootblock-$(CONFIG_FSP_CAR)+= car/cache_as_ram_fsp.S bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c
-romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += car/exit_car.S romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c
postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += car/exit_car.S
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36166 )
Change subject: soc/intel/common: Don't link CAR teardown in romstage ......................................................................
Patch Set 3: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/36166/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36166/3//COMMIT_MSG@9 PS3, Line 9: This is done in postcar stage. And add that this change is assuming postcar is *always* used for platforms utilizing soc/intel/common ?
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36166 )
Change subject: soc/intel/common: Don't link CAR teardown in romstage ......................................................................
Patch Set 3: Code-Review+2
Hello Aaron Durbin, Patrick Rudolph, Subrata Banik, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36166
to look at the new patch set (#5).
Change subject: soc/intel/common: Don't link CAR teardown in romstage ......................................................................
soc/intel/common: Don't link CAR teardown in romstage
This is done in postcar stage. This also assumes CAR tear down will always be done in postcar stage.
Change-Id: I0ff1624c20b9649ca0a8fa31c342bf99530076d7 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/common/block/cpu/Makefile.inc 1 file changed, 0 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/36166/5
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36166 )
Change subject: soc/intel/common: Don't link CAR teardown in romstage ......................................................................
Patch Set 5: Code-Review+2
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36166 )
Change subject: soc/intel/common: Don't link CAR teardown in romstage ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36166/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36166/3//COMMIT_MSG@9 PS3, Line 9: This is done in postcar stage.
And add that this change is assuming postcar is *always* used for platforms utilizing soc/intel/comm […]
Done
Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36166 )
Change subject: soc/intel/common: Don't link CAR teardown in romstage ......................................................................
soc/intel/common: Don't link CAR teardown in romstage
This is done in postcar stage. This also assumes CAR tear down will always be done in postcar stage.
Change-Id: I0ff1624c20b9649ca0a8fa31c342bf99530076d7 Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/36166 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Aaron Durbin adurbin@chromium.org --- M src/soc/intel/common/block/cpu/Makefile.inc 1 file changed, 0 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Aaron Durbin: Looks good to me, approved
diff --git a/src/soc/intel/common/block/cpu/Makefile.inc b/src/soc/intel/common/block/cpu/Makefile.inc index f263053..323d157 100644 --- a/src/soc/intel/common/block/cpu/Makefile.inc +++ b/src/soc/intel/common/block/cpu/Makefile.inc @@ -3,7 +3,6 @@ bootblock-$(CONFIG_FSP_CAR)+= car/cache_as_ram_fsp.S bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c
-romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += car/exit_car.S romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c
postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += car/exit_car.S