Change in coreboot[master]: AGESA f14/f15tn/f16kb: Deduplicate RAM settings

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41666 )

Change subject: AGESA f14/f15tn/f16kb: Deduplicate RAM settings
......................................................................

AGESA f14/f15tn/f16kb: Deduplicate RAM settings

On AGESA f14/f15tn, various RAM-related options were defined in an enum.
However, the preprocessor mess can't compare enum values. To make AGESA
build, each board redefined them as macros, shadowing the enum elements.
Clean this up by replacing the enums with macros in AGESA headers, and
delete the now-redundant redefinitions from all the mainboards.

Note that AGESA f16kb already uses macros, but each mainboard still had
commented-out definitions. Remove them as well, as they are unnecessary.

TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb
mainboards result in identical coreboot binaries.

Change-Id: Ie1085539013d3ae0363b1596fa48555300e45172
Signed-off-by: Angel Pons 
---
M src/mainboard/amd/inagua/buildOpts.c
M src/mainboard/amd/olivehill/buildOpts.c
M src/mainboard/amd/parmer/buildOpts.c
M src/mainboard/amd/persimmon/buildOpts.c
M src/mainboard/amd/south_station/buildOpts.c
M src/mainboard/amd/thatcher/buildOpts.c
M src/mainboard/amd/union_station/buildOpts.c
M src/mainboard/asrock/e350m1/buildOpts.c
M src/mainboard/asrock/imb-a180/buildOpts.c
M src/mainboard/asus/am1i-a/buildOpts.c
M src/mainboard/asus/f2a85-m/buildOpts.c
M src/mainboard/bap/ode_e20XX/buildOpts.c
M src/mainboard/biostar/a68n_5200/buildOpts.c
M src/mainboard/biostar/am1ml/buildOpts.c
M src/mainboard/elmex/pcm205400/buildOpts.c
M src/mainboard/gizmosphere/gizmo/buildOpts.c
M src/mainboard/gizmosphere/gizmo2/buildOpts.c
M src/mainboard/hp/abm/buildOpts.c
M src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
M src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
M src/mainboard/lenovo/g505s/buildOpts.c
M src/mainboard/lippert/frontrunner-af/buildOpts.c
M src/mainboard/lippert/toucan-af/buildOpts.c
M src/mainboard/msi/ms7721/buildOpts.c
M src/mainboard/pcengines/apu1/buildOpts.c
M src/vendorcode/amd/agesa/f14/AGESA.h
M src/vendorcode/amd/agesa/f15tn/AGESA.h
27 files changed, 53 insertions(+), 701 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/41666/1

diff --git a/src/mainboard/amd/inagua/buildOpts.c b/src/mainboard/amd/inagua/buildOpts.c
index 1ac2266..aecc9a5 100644
--- a/src/mainboard/amd/inagua/buildOpts.c
+++ b/src/mainboard/amd/inagua/buildOpts.c
@@ -167,29 +167,5 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY				200 ///< DDR 400
-#define DDR533_FREQUENCY				266 ///< DDR 533
-#define DDR667_FREQUENCY				333 ///< DDR 667
-#define DDR800_FREQUENCY				400 ///< DDR 800
-#define DDR1066_FREQUENCY				533 ///< DDR 1066
-#define DDR1333_FREQUENCY				667 ///< DDR 1333
-#define DDR1600_FREQUENCY				800 ///< DDR 1600
-#define DDR1866_FREQUENCY				933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY			934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC				2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL				0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT			1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>
diff --git a/src/mainboard/amd/olivehill/buildOpts.c b/src/mainboard/amd/olivehill/buildOpts.c
index cd2aa2e..f5ac742 100644
--- a/src/mainboard/amd/olivehill/buildOpts.c
+++ b/src/mainboard/amd/olivehill/buildOpts.c
@@ -205,33 +205,6 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-//#define DDR400_FREQUENCY   200     ///< DDR 400
-//#define DDR533_FREQUENCY   266     ///< DDR 533
-//#define DDR667_FREQUENCY   333     ///< DDR 667
-//#define DDR800_FREQUENCY   400     ///< DDR 800
-//#define DDR1066_FREQUENCY   533    ///< DDR 1066
-//#define DDR1333_FREQUENCY   667    ///< DDR 1333
-//#define DDR1600_FREQUENCY   800    ///< DDR 1600
-//#define DDR1866_FREQUENCY   933    ///< DDR 1866
-//#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-//#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-//#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-//#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-//
-///* QUANDRANK_TYPE */
-//#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-//#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-//
-///* USER_MEMORY_TIMING_MODE */
-//#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-//#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-//#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-//
-///* POWER_DOWN_MODE */
-//#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-//#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/amd/parmer/buildOpts.c b/src/mainboard/amd/parmer/buildOpts.c
index c8af858..694eda7 100644
--- a/src/mainboard/amd/parmer/buildOpts.c
+++ b/src/mainboard/amd/parmer/buildOpts.c
@@ -207,33 +207,6 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY   200     ///< DDR 400
-#define DDR533_FREQUENCY   266     ///< DDR 533
-#define DDR667_FREQUENCY   333     ///< DDR 667
-#define DDR800_FREQUENCY   400     ///< DDR 800
-#define DDR1066_FREQUENCY   533    ///< DDR 1066
-#define DDR1333_FREQUENCY   667    ///< DDR 1333
-#define DDR1600_FREQUENCY   800    ///< DDR 1600
-#define DDR1866_FREQUENCY   933    ///< DDR 1866
-#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/amd/persimmon/buildOpts.c b/src/mainboard/amd/persimmon/buildOpts.c
index 66d1a74..91c2182 100644
--- a/src/mainboard/amd/persimmon/buildOpts.c
+++ b/src/mainboard/amd/persimmon/buildOpts.c
@@ -167,29 +167,5 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY				200 ///< DDR 400
-#define DDR533_FREQUENCY				266 ///< DDR 533
-#define DDR667_FREQUENCY				333 ///< DDR 667
-#define DDR800_FREQUENCY				400 ///< DDR 800
-#define DDR1066_FREQUENCY				533 ///< DDR 1066
-#define DDR1333_FREQUENCY				667 ///< DDR 1333
-#define DDR1600_FREQUENCY				800 ///< DDR 1600
-#define DDR1866_FREQUENCY				933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY		934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>
diff --git a/src/mainboard/amd/south_station/buildOpts.c b/src/mainboard/amd/south_station/buildOpts.c
index 29668bc..44248a2 100644
--- a/src/mainboard/amd/south_station/buildOpts.c
+++ b/src/mainboard/amd/south_station/buildOpts.c
@@ -167,29 +167,5 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY              200 ///< DDR 400
-#define DDR533_FREQUENCY              266 ///< DDR 533
-#define DDR667_FREQUENCY              333 ///< DDR 667
-#define DDR800_FREQUENCY              400 ///< DDR 800
-#define DDR1066_FREQUENCY             533 ///< DDR 1066
-#define DDR1333_FREQUENCY             667 ///< DDR 1333
-#define DDR1600_FREQUENCY             800 ///< DDR 1600
-#define DDR1866_FREQUENCY             933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY     934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED             0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED             1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO                0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED             1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC            2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL           0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT       1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>
diff --git a/src/mainboard/amd/thatcher/buildOpts.c b/src/mainboard/amd/thatcher/buildOpts.c
index c4e0fce..f9908ef 100644
--- a/src/mainboard/amd/thatcher/buildOpts.c
+++ b/src/mainboard/amd/thatcher/buildOpts.c
@@ -207,33 +207,6 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY   200     ///< DDR 400
-#define DDR533_FREQUENCY   266     ///< DDR 533
-#define DDR667_FREQUENCY   333     ///< DDR 667
-#define DDR800_FREQUENCY   400     ///< DDR 800
-#define DDR1066_FREQUENCY   533    ///< DDR 1066
-#define DDR1333_FREQUENCY   667    ///< DDR 1333
-#define DDR1600_FREQUENCY   800    ///< DDR 1600
-#define DDR1866_FREQUENCY   933    ///< DDR 1866
-#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/amd/union_station/buildOpts.c b/src/mainboard/amd/union_station/buildOpts.c
index 29668bc..44248a2 100644
--- a/src/mainboard/amd/union_station/buildOpts.c
+++ b/src/mainboard/amd/union_station/buildOpts.c
@@ -167,29 +167,5 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY              200 ///< DDR 400
-#define DDR533_FREQUENCY              266 ///< DDR 533
-#define DDR667_FREQUENCY              333 ///< DDR 667
-#define DDR800_FREQUENCY              400 ///< DDR 800
-#define DDR1066_FREQUENCY             533 ///< DDR 1066
-#define DDR1333_FREQUENCY             667 ///< DDR 1333
-#define DDR1600_FREQUENCY             800 ///< DDR 1600
-#define DDR1866_FREQUENCY             933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY     934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED             0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED             1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO                0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED             1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC            2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL           0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT       1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>
diff --git a/src/mainboard/asrock/e350m1/buildOpts.c b/src/mainboard/asrock/e350m1/buildOpts.c
index 6217390..49afc5b 100644
--- a/src/mainboard/asrock/e350m1/buildOpts.c
+++ b/src/mainboard/asrock/e350m1/buildOpts.c
@@ -167,29 +167,5 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY				200 ///< DDR 400
-#define DDR533_FREQUENCY				266 ///< DDR 533
-#define DDR667_FREQUENCY				333 ///< DDR 667
-#define DDR800_FREQUENCY				400 ///< DDR 800
-#define DDR1066_FREQUENCY				533 ///< DDR 1066
-#define DDR1333_FREQUENCY				667 ///< DDR 1333
-#define DDR1600_FREQUENCY				800 ///< DDR 1600
-#define DDR1866_FREQUENCY				933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY			934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC				2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL				0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT			1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>
diff --git a/src/mainboard/asrock/imb-a180/buildOpts.c b/src/mainboard/asrock/imb-a180/buildOpts.c
index 9145a17..3456121 100644
--- a/src/mainboard/asrock/imb-a180/buildOpts.c
+++ b/src/mainboard/asrock/imb-a180/buildOpts.c
@@ -205,33 +205,6 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-//#define DDR400_FREQUENCY   200     ///< DDR 400
-//#define DDR533_FREQUENCY   266     ///< DDR 533
-//#define DDR667_FREQUENCY   333     ///< DDR 667
-//#define DDR800_FREQUENCY   400     ///< DDR 800
-//#define DDR1066_FREQUENCY   533    ///< DDR 1066
-//#define DDR1333_FREQUENCY   667    ///< DDR 1333
-//#define DDR1600_FREQUENCY   800    ///< DDR 1600
-//#define DDR1866_FREQUENCY   933    ///< DDR 1866
-//#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-//#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-//#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-//#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-//
-///* QUANDRANK_TYPE */
-//#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-//#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-//
-///* USER_MEMORY_TIMING_MODE */
-//#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-//#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-//#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-//
-///* POWER_DOWN_MODE */
-//#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-//#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/asus/am1i-a/buildOpts.c b/src/mainboard/asus/am1i-a/buildOpts.c
index b57581f..d0a8a43 100644
--- a/src/mainboard/asus/am1i-a/buildOpts.c
+++ b/src/mainboard/asus/am1i-a/buildOpts.c
@@ -218,33 +218,6 @@
 // #define BLDCFG_FCH_GPP_PORT2_HOTPLUG          FALSE
 // #define BLDCFG_FCH_GPP_PORT3_HOTPLUG          FALSE

-/* MEMORY_BUS_SPEED */
-//#define DDR400_FREQUENCY   200     ///< DDR 400
-//#define DDR533_FREQUENCY   266     ///< DDR 533
-//#define DDR667_FREQUENCY   333     ///< DDR 667
-//#define DDR800_FREQUENCY   400     ///< DDR 800
-//#define DDR1066_FREQUENCY   533    ///< DDR 1066
-//#define DDR1333_FREQUENCY   667    ///< DDR 1333
-//#define DDR1600_FREQUENCY   800    ///< DDR 1600
-//#define DDR1866_FREQUENCY   933    ///< DDR 1866
-//#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-//#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-//#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-//#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-//
-///* QUANDRANK_TYPE */
-//#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-//#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-//
-///* USER_MEMORY_TIMING_MODE */
-//#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-//#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-//#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-//
-///* POWER_DOWN_MODE */
-//#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-//#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/asus/f2a85-m/buildOpts.c b/src/mainboard/asus/f2a85-m/buildOpts.c
index 13f2bd8..65731aa 100644
--- a/src/mainboard/asus/f2a85-m/buildOpts.c
+++ b/src/mainboard/asus/f2a85-m/buildOpts.c
@@ -207,33 +207,6 @@
 // #define BLDCFG_FCH_GPP_PORT2_HOTPLUG          FALSE
 // #define BLDCFG_FCH_GPP_PORT3_HOTPLUG          FALSE

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY   200     ///< DDR 400
-#define DDR533_FREQUENCY   266     ///< DDR 533
-#define DDR667_FREQUENCY   333     ///< DDR 667
-#define DDR800_FREQUENCY   400     ///< DDR 800
-#define DDR1066_FREQUENCY   533    ///< DDR 1066
-#define DDR1333_FREQUENCY   667    ///< DDR 1333
-#define DDR1600_FREQUENCY   800    ///< DDR 1600
-#define DDR1866_FREQUENCY   933    ///< DDR 1866
-#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/bap/ode_e20XX/buildOpts.c b/src/mainboard/bap/ode_e20XX/buildOpts.c
index a42bbca..d4c398a 100644
--- a/src/mainboard/bap/ode_e20XX/buildOpts.c
+++ b/src/mainboard/bap/ode_e20XX/buildOpts.c
@@ -205,33 +205,6 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-//#define DDR400_FREQUENCY   200     ///< DDR 400
-//#define DDR533_FREQUENCY   266     ///< DDR 533
-//#define DDR667_FREQUENCY   333     ///< DDR 667
-//#define DDR800_FREQUENCY   400     ///< DDR 800
-//#define DDR1066_FREQUENCY   533    ///< DDR 1066
-//#define DDR1333_FREQUENCY   667    ///< DDR 1333
-//#define DDR1600_FREQUENCY   800    ///< DDR 1600
-//#define DDR1866_FREQUENCY   933    ///< DDR 1866
-//#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-//#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-//#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-//#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-//
-///* QUANDRANK_TYPE */
-//#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-//#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-//
-///* USER_MEMORY_TIMING_MODE */
-//#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-//#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-//#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-//
-///* POWER_DOWN_MODE */
-//#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-//#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/biostar/a68n_5200/buildOpts.c b/src/mainboard/biostar/a68n_5200/buildOpts.c
index cd2aa2e..f5ac742 100644
--- a/src/mainboard/biostar/a68n_5200/buildOpts.c
+++ b/src/mainboard/biostar/a68n_5200/buildOpts.c
@@ -205,33 +205,6 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-//#define DDR400_FREQUENCY   200     ///< DDR 400
-//#define DDR533_FREQUENCY   266     ///< DDR 533
-//#define DDR667_FREQUENCY   333     ///< DDR 667
-//#define DDR800_FREQUENCY   400     ///< DDR 800
-//#define DDR1066_FREQUENCY   533    ///< DDR 1066
-//#define DDR1333_FREQUENCY   667    ///< DDR 1333
-//#define DDR1600_FREQUENCY   800    ///< DDR 1600
-//#define DDR1866_FREQUENCY   933    ///< DDR 1866
-//#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-//#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-//#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-//#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-//
-///* QUANDRANK_TYPE */
-//#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-//#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-//
-///* USER_MEMORY_TIMING_MODE */
-//#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-//#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-//#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-//
-///* POWER_DOWN_MODE */
-//#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-//#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/biostar/am1ml/buildOpts.c b/src/mainboard/biostar/am1ml/buildOpts.c
index 61cbf0f..54f9246 100644
--- a/src/mainboard/biostar/am1ml/buildOpts.c
+++ b/src/mainboard/biostar/am1ml/buildOpts.c
@@ -205,33 +205,6 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-//#define DDR400_FREQUENCY   200     ///< DDR 400
-//#define DDR533_FREQUENCY   266     ///< DDR 533
-//#define DDR667_FREQUENCY   333     ///< DDR 667
-//#define DDR800_FREQUENCY   400     ///< DDR 800
-//#define DDR1066_FREQUENCY   533    ///< DDR 1066
-//#define DDR1333_FREQUENCY   667    ///< DDR 1333
-//#define DDR1600_FREQUENCY   800    ///< DDR 1600
-//#define DDR1866_FREQUENCY   933    ///< DDR 1866
-//#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-//#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-//#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-//#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-//
-///* QUANDRANK_TYPE */
-//#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-//#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-//
-///* USER_MEMORY_TIMING_MODE */
-//#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-//#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-//#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-//
-///* POWER_DOWN_MODE */
-//#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-//#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/elmex/pcm205400/buildOpts.c b/src/mainboard/elmex/pcm205400/buildOpts.c
index 7fa480b..be07053 100644
--- a/src/mainboard/elmex/pcm205400/buildOpts.c
+++ b/src/mainboard/elmex/pcm205400/buildOpts.c
@@ -167,29 +167,5 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY				200 ///< DDR 400
-#define DDR533_FREQUENCY				266 ///< DDR 533
-#define DDR667_FREQUENCY				333 ///< DDR 667
-#define DDR800_FREQUENCY				400 ///< DDR 800
-#define DDR1066_FREQUENCY				533 ///< DDR 1066
-#define DDR1333_FREQUENCY				667 ///< DDR 1333
-#define DDR1600_FREQUENCY				800 ///< DDR 1600
-#define DDR1866_FREQUENCY				933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY		934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>
diff --git a/src/mainboard/gizmosphere/gizmo/buildOpts.c b/src/mainboard/gizmosphere/gizmo/buildOpts.c
index 66d1a74..91c2182 100644
--- a/src/mainboard/gizmosphere/gizmo/buildOpts.c
+++ b/src/mainboard/gizmosphere/gizmo/buildOpts.c
@@ -167,29 +167,5 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY				200 ///< DDR 400
-#define DDR533_FREQUENCY				266 ///< DDR 533
-#define DDR667_FREQUENCY				333 ///< DDR 667
-#define DDR800_FREQUENCY				400 ///< DDR 800
-#define DDR1066_FREQUENCY				533 ///< DDR 1066
-#define DDR1333_FREQUENCY				667 ///< DDR 1333
-#define DDR1600_FREQUENCY				800 ///< DDR 1600
-#define DDR1866_FREQUENCY				933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY		934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>
diff --git a/src/mainboard/gizmosphere/gizmo2/buildOpts.c b/src/mainboard/gizmosphere/gizmo2/buildOpts.c
index a42bbca..d4c398a 100644
--- a/src/mainboard/gizmosphere/gizmo2/buildOpts.c
+++ b/src/mainboard/gizmosphere/gizmo2/buildOpts.c
@@ -205,33 +205,6 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-//#define DDR400_FREQUENCY   200     ///< DDR 400
-//#define DDR533_FREQUENCY   266     ///< DDR 533
-//#define DDR667_FREQUENCY   333     ///< DDR 667
-//#define DDR800_FREQUENCY   400     ///< DDR 800
-//#define DDR1066_FREQUENCY   533    ///< DDR 1066
-//#define DDR1333_FREQUENCY   667    ///< DDR 1333
-//#define DDR1600_FREQUENCY   800    ///< DDR 1600
-//#define DDR1866_FREQUENCY   933    ///< DDR 1866
-//#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-//#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-//#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-//#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-//
-///* QUANDRANK_TYPE */
-//#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-//#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-//
-///* USER_MEMORY_TIMING_MODE */
-//#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-//#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-//#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-//
-///* POWER_DOWN_MODE */
-//#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-//#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/hp/abm/buildOpts.c b/src/mainboard/hp/abm/buildOpts.c
index 8efd0a2..1297484 100644
--- a/src/mainboard/hp/abm/buildOpts.c
+++ b/src/mainboard/hp/abm/buildOpts.c
@@ -210,33 +210,6 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-//#define DDR400_FREQUENCY   200     ///< DDR 400
-//#define DDR533_FREQUENCY   266     ///< DDR 533
-//#define DDR667_FREQUENCY   333     ///< DDR 667
-//#define DDR800_FREQUENCY   400     ///< DDR 800
-//#define DDR1066_FREQUENCY   533    ///< DDR 1066
-//#define DDR1333_FREQUENCY   667    ///< DDR 1333
-//#define DDR1600_FREQUENCY   800    ///< DDR 1600
-//#define DDR1866_FREQUENCY   933    ///< DDR 1866
-//#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-//#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-//#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-//#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-//
-///* QUANDRANK_TYPE */
-//#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-//#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-//
-///* USER_MEMORY_TIMING_MODE */
-//#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-//#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-//#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-//
-///* POWER_DOWN_MODE */
-//#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-//#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c b/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
index 19aac23..107c993 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
+++ b/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
@@ -208,33 +208,6 @@
 // #define BLDCFG_FCH_GPP_PORT2_HOTPLUG          FALSE
 // #define BLDCFG_FCH_GPP_PORT3_HOTPLUG          FALSE

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY   200     ///< DDR 400
-#define DDR533_FREQUENCY   266     ///< DDR 533
-#define DDR667_FREQUENCY   333     ///< DDR 667
-#define DDR800_FREQUENCY   400     ///< DDR 800
-#define DDR1066_FREQUENCY   533    ///< DDR 1066
-#define DDR1333_FREQUENCY   667    ///< DDR 1333
-#define DDR1600_FREQUENCY   800    ///< DDR 1600
-#define DDR1866_FREQUENCY   933    ///< DDR 1866
-#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c b/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
index 1e81f5b..3bc97ea 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
@@ -160,36 +160,6 @@
 #define BLDCFG_HEAP_DRAM_ADDRESS				0xB0000
 #define BLDCFG_CFG_TEMP_PCIE_MMIO_BASE_ADDRESS	0xD0000000

-/**
- * AGESA configuration values selection.
- * Uncomment and specify the value for the configuration options
- * needed by the system.
- */
-
-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY				200 /**< DDR 400 */
-#define DDR533_FREQUENCY				266 /**< DDR 533 */
-#define DDR667_FREQUENCY				333 /**< DDR 667 */
-#define DDR800_FREQUENCY				400 /**< DDR 800 */
-#define DDR1066_FREQUENCY				533 /**< DDR 1066 */
-#define DDR1333_FREQUENCY				667 /**< DDR 1333 */
-#define DDR1600_FREQUENCY				800 /**< DDR 1600 */
-#define DDR1866_FREQUENCY				933 /**< DDR 1866 */
-#define UNSUPPORTED_DDR_FREQUENCY		934 /**< Max limit of DDR frequency */
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 /**< Quadrank registered DIMM */
-#define QUADRANK_UNBUFFERED				1 /**< Quadrank unbuffered DIMM */
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 /**< Use best rate possible */
-#define TIMING_MODE_LIMITED				1 /**< Set user top limit */
-#define TIMING_MODE_SPECIFIC			2 /**< Set user specified speed */
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 /**< Channel power down mode */
-#define POWER_DOWN_BY_CHIP_SELECT		1 /**< Chip select power down mode */
-
 /* AGESA nonsense: this header depends on the definitions above */
 /* Instantiate all solution relevant data. */
 #include <PlatformInstall.h>
diff --git a/src/mainboard/lenovo/g505s/buildOpts.c b/src/mainboard/lenovo/g505s/buildOpts.c
index 92a1c69..c78c5c5 100644
--- a/src/mainboard/lenovo/g505s/buildOpts.c
+++ b/src/mainboard/lenovo/g505s/buildOpts.c
@@ -208,33 +208,6 @@
 // #define BLDCFG_FCH_GPP_PORT2_HOTPLUG          FALSE
 // #define BLDCFG_FCH_GPP_PORT3_HOTPLUG          FALSE

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY   200     ///< DDR 400
-#define DDR533_FREQUENCY   266     ///< DDR 533
-#define DDR667_FREQUENCY   333     ///< DDR 667
-#define DDR800_FREQUENCY   400     ///< DDR 800
-#define DDR1066_FREQUENCY   533    ///< DDR 1066
-#define DDR1333_FREQUENCY   667    ///< DDR 1333
-#define DDR1600_FREQUENCY   800    ///< DDR 1600
-#define DDR1866_FREQUENCY   933    ///< DDR 1866
-#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/lippert/frontrunner-af/buildOpts.c b/src/mainboard/lippert/frontrunner-af/buildOpts.c
index 66d1a74..91c2182 100644
--- a/src/mainboard/lippert/frontrunner-af/buildOpts.c
+++ b/src/mainboard/lippert/frontrunner-af/buildOpts.c
@@ -167,29 +167,5 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY				200 ///< DDR 400
-#define DDR533_FREQUENCY				266 ///< DDR 533
-#define DDR667_FREQUENCY				333 ///< DDR 667
-#define DDR800_FREQUENCY				400 ///< DDR 800
-#define DDR1066_FREQUENCY				533 ///< DDR 1066
-#define DDR1333_FREQUENCY				667 ///< DDR 1333
-#define DDR1600_FREQUENCY				800 ///< DDR 1600
-#define DDR1866_FREQUENCY				933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY		934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>
diff --git a/src/mainboard/lippert/toucan-af/buildOpts.c b/src/mainboard/lippert/toucan-af/buildOpts.c
index 66d1a74..91c2182 100644
--- a/src/mainboard/lippert/toucan-af/buildOpts.c
+++ b/src/mainboard/lippert/toucan-af/buildOpts.c
@@ -167,29 +167,5 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY				200 ///< DDR 400
-#define DDR533_FREQUENCY				266 ///< DDR 533
-#define DDR667_FREQUENCY				333 ///< DDR 667
-#define DDR800_FREQUENCY				400 ///< DDR 800
-#define DDR1066_FREQUENCY				533 ///< DDR 1066
-#define DDR1333_FREQUENCY				667 ///< DDR 1333
-#define DDR1600_FREQUENCY				800 ///< DDR 1600
-#define DDR1866_FREQUENCY				933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY		934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>
diff --git a/src/mainboard/msi/ms7721/buildOpts.c b/src/mainboard/msi/ms7721/buildOpts.c
index c7c4426..6185894 100644
--- a/src/mainboard/msi/ms7721/buildOpts.c
+++ b/src/mainboard/msi/ms7721/buildOpts.c
@@ -207,33 +207,6 @@
 // #define BLDCFG_FCH_GPP_PORT2_HOTPLUG          FALSE
 // #define BLDCFG_FCH_GPP_PORT3_HOTPLUG          FALSE

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY   200     ///< DDR 400
-#define DDR533_FREQUENCY   266     ///< DDR 533
-#define DDR667_FREQUENCY   333     ///< DDR 667
-#define DDR800_FREQUENCY   400     ///< DDR 800
-#define DDR1066_FREQUENCY   533    ///< DDR 1066
-#define DDR1333_FREQUENCY   667    ///< DDR 1333
-#define DDR1600_FREQUENCY   800    ///< DDR 1600
-#define DDR1866_FREQUENCY   933    ///< DDR 1866
-#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/pcengines/apu1/buildOpts.c b/src/mainboard/pcengines/apu1/buildOpts.c
index a810559..3a14ce5 100644
--- a/src/mainboard/pcengines/apu1/buildOpts.c
+++ b/src/mainboard/pcengines/apu1/buildOpts.c
@@ -167,29 +167,5 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY				200 ///< DDR 400
-#define DDR533_FREQUENCY				266 ///< DDR 533
-#define DDR667_FREQUENCY				333 ///< DDR 667
-#define DDR800_FREQUENCY				400 ///< DDR 800
-#define DDR1066_FREQUENCY				533 ///< DDR 1066
-#define DDR1333_FREQUENCY				667 ///< DDR 1333
-#define DDR1600_FREQUENCY				800 ///< DDR 1600
-#define DDR1866_FREQUENCY				933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY		934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>
diff --git a/src/vendorcode/amd/agesa/f14/AGESA.h b/src/vendorcode/amd/agesa/f14/AGESA.h
index 047b037..03f1670 100644
--- a/src/vendorcode/amd/agesa/f14/AGESA.h
+++ b/src/vendorcode/amd/agesa/f14/AGESA.h
@@ -1015,37 +1015,37 @@
 } TECHNOLOGY_TYPE;

/// Build Configuration values for BLDCFG_MEMORY_BUS_FREQUENCY_LIMIT & BLDCFG_MEMORY_CLOCK_SELECT
-typedef enum {
-  DDR400_FREQUENCY = 200,     ///< DDR 400
-  DDR533_FREQUENCY = 266,     ///< DDR 533
-  DDR667_FREQUENCY = 333,     ///< DDR 667
-  DDR800_FREQUENCY = 400,     ///< DDR 800
-  DDR1066_FREQUENCY = 533,    ///< DDR 1066
-  DDR1333_FREQUENCY = 667,    ///< DDR 1333
-  DDR1600_FREQUENCY = 800,    ///< DDR 1600
-  DDR1866_FREQUENCY = 933,    ///< DDR 1866
-  UNSUPPORTED_DDR_FREQUENCY   ///< Highest limit of DDR frequency
-} MEMORY_BUS_SPEED;
+typedef unsigned int MEMORY_BUS_SPEED;
+
+#define DDR400_FREQUENCY		200 ///< DDR  400
+#define DDR533_FREQUENCY		266 ///< DDR  533
+#define DDR667_FREQUENCY		333 ///< DDR  667
+#define DDR800_FREQUENCY		400 ///< DDR  800
+#define DDR1066_FREQUENCY		533 ///< DDR 1066
+#define DDR1333_FREQUENCY		667 ///< DDR 1333
+#define DDR1600_FREQUENCY		800 ///< DDR 1600
+#define DDR1866_FREQUENCY		933 ///< DDR 1866
+#define UNSUPPORTED_DDR_FREQUENCY	934 ///< Highest limit of DDR frequency

/// Build Configuration values for BLDCFG_MEMORY_QUADRANK_TYPE
-typedef enum {
-  QUADRANK_REGISTERED,        ///< Quadrank registered DIMM
-  QUADRANK_UNBUFFERED         ///< Quadrank unbuffered DIMM
-} QUANDRANK_TYPE;
+typedef unsigned int QUANDRANK_TYPE;
+
+#define QUADRANK_REGISTERED		0 ///< Quadrank registered DIMM
+#define QUADRANK_UNBUFFERED		1 ///< Quadrank unbuffered DIMM

/// Build Configuration values for BLDCFG_TIMING_MODE_SELECT
-typedef enum {
-  TIMING_MODE_AUTO,           ///< Use best rate possible
-  TIMING_MODE_LIMITED,        ///< Set user top limit
-  TIMING_MODE_SPECIFIC        ///< Set user specified speed
-} USER_MEMORY_TIMING_MODE;
+typedef unsigned int USER_MEMORY_TIMING_MODE;
+
+#define TIMING_MODE_AUTO		0 ///< Use best rate possible
+#define TIMING_MODE_LIMITED		1 ///< Set user top limit
+#define TIMING_MODE_SPECIFIC		2 ///< Set user specified speed

/// Build Configuration values for BLDCFG_POWER_DOWN_MODE
-typedef enum {
-  POWER_DOWN_BY_CHANNEL,      ///< Channel power down mode
-  POWER_DOWN_BY_CHIP_SELECT,  ///< Chip select power down mode
-  POWER_DOWN_MODE_AUTO        ///< AGESA to select power down mode
-} POWER_DOWN_MODE;
+typedef unsigned int POWER_DOWN_MODE;
+
+#define POWER_DOWN_BY_CHANNEL		0 ///< Channel power down mode
+#define POWER_DOWN_BY_CHIP_SELECT	1 ///< Chip select power down mode
+#define POWER_DOWN_MODE_AUTO		2 ///< AGESA to select power down mode

/// Low voltage support
 typedef enum {
diff --git a/src/vendorcode/amd/agesa/f15tn/AGESA.h b/src/vendorcode/amd/agesa/f15tn/AGESA.h
index 3ac9071..922a8ee 100644
--- a/src/vendorcode/amd/agesa/f15tn/AGESA.h
+++ b/src/vendorcode/amd/agesa/f15tn/AGESA.h
@@ -1382,40 +1382,40 @@
 } TECHNOLOGY_TYPE;

/// Build Configuration values for BLDCFG_MEMORY_BUS_FREQUENCY_LIMIT & BLDCFG_MEMORY_CLOCK_SELECT
-typedef enum {
-  DDR400_FREQUENCY = 200,     ///< DDR 400
-  DDR533_FREQUENCY = 266,     ///< DDR 533
-  DDR667_FREQUENCY = 333,     ///< DDR 667
-  DDR800_FREQUENCY = 400,     ///< DDR 800
-  DDR1066_FREQUENCY = 533,    ///< DDR 1066
-  DDR1333_FREQUENCY = 667,    ///< DDR 1333
-  DDR1600_FREQUENCY = 800,    ///< DDR 1600
-  DDR1866_FREQUENCY = 933,    ///< DDR 1866
-  DDR2100_FREQUENCY = 1050,   ///< DDR 2100
-  DDR2133_FREQUENCY = 1066,   ///< DDR 2133
-  DDR2400_FREQUENCY = 1200,   ///< DDR 2400
-  UNSUPPORTED_DDR_FREQUENCY   ///< Highest limit of DDR frequency
-} MEMORY_BUS_SPEED;
+typedef unsigned int MEMORY_BUS_SPEED;
+
+#define DDR400_FREQUENCY		 200 ///< DDR  400
+#define DDR533_FREQUENCY		 266 ///< DDR  533
+#define DDR667_FREQUENCY		 333 ///< DDR  667
+#define DDR800_FREQUENCY		 400 ///< DDR  800
+#define DDR1066_FREQUENCY		 533 ///< DDR 1066
+#define DDR1333_FREQUENCY		 667 ///< DDR 1333
+#define DDR1600_FREQUENCY		 800 ///< DDR 1600
+#define DDR1866_FREQUENCY		 933 ///< DDR 1866
+#define DDR2100_FREQUENCY		1050 ///< DDR 2100
+#define DDR2133_FREQUENCY		1066 ///< DDR 2133
+#define DDR2400_FREQUENCY		1200 ///< DDR 2400
+#define UNSUPPORTED_DDR_FREQUENCY	1201 ///< Highest limit of DDR frequency

/// Build Configuration values for BLDCFG_MEMORY_QUADRANK_TYPE
-typedef enum {
-  QUADRANK_REGISTERED,        ///< Quadrank registered DIMM
-  QUADRANK_UNBUFFERED         ///< Quadrank unbuffered DIMM
-} QUANDRANK_TYPE;
+typedef unsigned int QUANDRANK_TYPE;
+
+#define QUADRANK_REGISTERED		0 ///< Quadrank registered DIMM
+#define QUADRANK_UNBUFFERED		1 ///< Quadrank unbuffered DIMM

/// Build Configuration values for BLDCFG_TIMING_MODE_SELECT
-typedef enum {
-  TIMING_MODE_AUTO,           ///< Use best rate possible
-  TIMING_MODE_LIMITED,        ///< Set user top limit
-  TIMING_MODE_SPECIFIC        ///< Set user specified speed
-} USER_MEMORY_TIMING_MODE;
+typedef unsigned int USER_MEMORY_TIMING_MODE;
+
+#define TIMING_MODE_AUTO		0 ///< Use best rate possible
+#define TIMING_MODE_LIMITED		1 ///< Set user top limit
+#define TIMING_MODE_SPECIFIC		2 ///< Set user specified speed

/// Build Configuration values for BLDCFG_POWER_DOWN_MODE
-typedef enum {
-  POWER_DOWN_BY_CHANNEL,      ///< Channel power down mode
-  POWER_DOWN_BY_CHIP_SELECT,  ///< Chip select power down mode
-  POWER_DOWN_MODE_AUTO        ///< AGESA to select power down mode
-} POWER_DOWN_MODE;
+typedef unsigned int POWER_DOWN_MODE;
+
+#define POWER_DOWN_BY_CHANNEL		0 ///< Channel power down mode
+#define POWER_DOWN_BY_CHIP_SELECT	1 ///< Chip select power down mode
+#define POWER_DOWN_MODE_AUTO		2 ///< AGESA to select power down mode

/// Low voltage support
 typedef enum {

[Arthur Heymans (Code Review)]

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41666 )

Change subject: AGESA f14/f15tn/f16kb: Deduplicate RAM settings
......................................................................

Patch Set 1: Code-Review+2

[Krystian Hebel (Code Review)]

Krystian Hebel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41666 )

Change subject: AGESA f14/f15tn/f16kb: Deduplicate RAM settings
......................................................................

Patch Set 1: Code-Review+1

[Angel Pons (Code Review)]

Hello Mike Banon, build bot (Jenkins), Michał Żygowski, Arthur Heymans, Mike Banon, Krystian Hebel, Alexander Couzens, Patrick Rudolph, Piotr Król,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/41666

to look at the new patch set (#3).

Change subject: AGESA f14/f15tn/f16kb: Deduplicate RAM settings
......................................................................

AGESA f14/f15tn/f16kb: Deduplicate RAM settings

On AGESA f14/f15tn, various RAM-related options were defined in an enum.
However, the preprocessor mess can't compare enum values. To make AGESA
build, each board redefined them as macros, shadowing the enum elements.
Clean this up by replacing the enums with macros in AGESA headers, and
delete the now-redundant redefinitions from all the mainboards.

Note that AGESA f16kb already uses macros, but each mainboard still had
commented-out definitions. Remove them as well, as they are unnecessary.

TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb
mainboards result in identical coreboot binaries.

Change-Id: Ie1085539013d3ae0363b1596fa48555300e45172
Signed-off-by: Angel Pons 
---
M src/mainboard/amd/inagua/buildOpts.c
M src/mainboard/amd/olivehill/buildOpts.c
M src/mainboard/amd/parmer/buildOpts.c
M src/mainboard/amd/persimmon/buildOpts.c
M src/mainboard/amd/south_station/buildOpts.c
M src/mainboard/amd/thatcher/buildOpts.c
M src/mainboard/amd/union_station/buildOpts.c
M src/mainboard/asrock/e350m1/buildOpts.c
M src/mainboard/asrock/imb-a180/buildOpts.c
M src/mainboard/asus/am1i-a/buildOpts.c
M src/mainboard/asus/f2a85-m/buildOpts.c
M src/mainboard/bap/ode_e20XX/buildOpts.c
M src/mainboard/biostar/a68n_5200/buildOpts.c
M src/mainboard/biostar/am1ml/buildOpts.c
M src/mainboard/elmex/pcm205400/buildOpts.c
M src/mainboard/gizmosphere/gizmo/buildOpts.c
M src/mainboard/gizmosphere/gizmo2/buildOpts.c
M src/mainboard/hp/abm/buildOpts.c
M src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
M src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
M src/mainboard/lenovo/g505s/buildOpts.c
M src/mainboard/lippert/frontrunner-af/buildOpts.c
M src/mainboard/lippert/toucan-af/buildOpts.c
M src/mainboard/msi/ms7721/buildOpts.c
M src/mainboard/pcengines/apu1/buildOpts.c
M src/vendorcode/amd/agesa/f14/AGESA.h
M src/vendorcode/amd/agesa/f15tn/AGESA.h
27 files changed, 53 insertions(+), 701 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/41666/3

[Nico Huber (Code Review)]

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41666 )

Change subject: AGESA f14/f15tn/f16kb: Deduplicate RAM settings
......................................................................

Patch Set 5: Code-Review+2

Would have been fun to change the include order... I guess the
compiler would have seen things like

typedef enum {
            200 = 200,
            ...

[Nico Huber (Code Review)]

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/41666 )

Change subject: AGESA f14/f15tn/f16kb: Deduplicate RAM settings
......................................................................

AGESA f14/f15tn/f16kb: Deduplicate RAM settings

On AGESA f14/f15tn, various RAM-related options were defined in an enum.
However, the preprocessor mess can't compare enum values. To make AGESA
build, each board redefined them as macros, shadowing the enum elements.
Clean this up by replacing the enums with macros in AGESA headers, and
delete the now-redundant redefinitions from all the mainboards.

Note that AGESA f16kb already uses macros, but each mainboard still had
commented-out definitions. Remove them as well, as they are unnecessary.

TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb
mainboards result in identical coreboot binaries.

Change-Id: Ie1085539013d3ae0363b1596fa48555300e45172
Signed-off-by: Angel Pons 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41666
Reviewed-by: Nico Huber 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/amd/inagua/buildOpts.c
M src/mainboard/amd/olivehill/buildOpts.c
M src/mainboard/amd/parmer/buildOpts.c
M src/mainboard/amd/persimmon/buildOpts.c
M src/mainboard/amd/south_station/buildOpts.c
M src/mainboard/amd/thatcher/buildOpts.c
M src/mainboard/amd/union_station/buildOpts.c
M src/mainboard/asrock/e350m1/buildOpts.c
M src/mainboard/asrock/imb-a180/buildOpts.c
M src/mainboard/asus/am1i-a/buildOpts.c
M src/mainboard/asus/f2a85-m/buildOpts.c
M src/mainboard/bap/ode_e20XX/buildOpts.c
M src/mainboard/biostar/a68n_5200/buildOpts.c
M src/mainboard/biostar/am1ml/buildOpts.c
M src/mainboard/elmex/pcm205400/buildOpts.c
M src/mainboard/gizmosphere/gizmo/buildOpts.c
M src/mainboard/gizmosphere/gizmo2/buildOpts.c
M src/mainboard/hp/abm/buildOpts.c
M src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
M src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
M src/mainboard/lenovo/g505s/buildOpts.c
M src/mainboard/lippert/frontrunner-af/buildOpts.c
M src/mainboard/lippert/toucan-af/buildOpts.c
M src/mainboard/msi/ms7721/buildOpts.c
M src/mainboard/pcengines/apu1/buildOpts.c
M src/vendorcode/amd/agesa/f14/AGESA.h
M src/vendorcode/amd/agesa/f15tn/AGESA.h
27 files changed, 53 insertions(+), 701 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Nico Huber: Looks good to me, approved

diff --git a/src/mainboard/amd/inagua/buildOpts.c b/src/mainboard/amd/inagua/buildOpts.c
index 1ac2266..aecc9a5 100644
--- a/src/mainboard/amd/inagua/buildOpts.c
+++ b/src/mainboard/amd/inagua/buildOpts.c
@@ -167,29 +167,5 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY				200 ///< DDR 400
-#define DDR533_FREQUENCY				266 ///< DDR 533
-#define DDR667_FREQUENCY				333 ///< DDR 667
-#define DDR800_FREQUENCY				400 ///< DDR 800
-#define DDR1066_FREQUENCY				533 ///< DDR 1066
-#define DDR1333_FREQUENCY				667 ///< DDR 1333
-#define DDR1600_FREQUENCY				800 ///< DDR 1600
-#define DDR1866_FREQUENCY				933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY			934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC				2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL				0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT			1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>
diff --git a/src/mainboard/amd/olivehill/buildOpts.c b/src/mainboard/amd/olivehill/buildOpts.c
index cd2aa2e..f5ac742 100644
--- a/src/mainboard/amd/olivehill/buildOpts.c
+++ b/src/mainboard/amd/olivehill/buildOpts.c
@@ -205,33 +205,6 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-//#define DDR400_FREQUENCY   200     ///< DDR 400
-//#define DDR533_FREQUENCY   266     ///< DDR 533
-//#define DDR667_FREQUENCY   333     ///< DDR 667
-//#define DDR800_FREQUENCY   400     ///< DDR 800
-//#define DDR1066_FREQUENCY   533    ///< DDR 1066
-//#define DDR1333_FREQUENCY   667    ///< DDR 1333
-//#define DDR1600_FREQUENCY   800    ///< DDR 1600
-//#define DDR1866_FREQUENCY   933    ///< DDR 1866
-//#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-//#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-//#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-//#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-//
-///* QUANDRANK_TYPE */
-//#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-//#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-//
-///* USER_MEMORY_TIMING_MODE */
-//#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-//#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-//#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-//
-///* POWER_DOWN_MODE */
-//#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-//#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/amd/parmer/buildOpts.c b/src/mainboard/amd/parmer/buildOpts.c
index c8af858..694eda7 100644
--- a/src/mainboard/amd/parmer/buildOpts.c
+++ b/src/mainboard/amd/parmer/buildOpts.c
@@ -207,33 +207,6 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY   200     ///< DDR 400
-#define DDR533_FREQUENCY   266     ///< DDR 533
-#define DDR667_FREQUENCY   333     ///< DDR 667
-#define DDR800_FREQUENCY   400     ///< DDR 800
-#define DDR1066_FREQUENCY   533    ///< DDR 1066
-#define DDR1333_FREQUENCY   667    ///< DDR 1333
-#define DDR1600_FREQUENCY   800    ///< DDR 1600
-#define DDR1866_FREQUENCY   933    ///< DDR 1866
-#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/amd/persimmon/buildOpts.c b/src/mainboard/amd/persimmon/buildOpts.c
index 66d1a74..91c2182 100644
--- a/src/mainboard/amd/persimmon/buildOpts.c
+++ b/src/mainboard/amd/persimmon/buildOpts.c
@@ -167,29 +167,5 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY				200 ///< DDR 400
-#define DDR533_FREQUENCY				266 ///< DDR 533
-#define DDR667_FREQUENCY				333 ///< DDR 667
-#define DDR800_FREQUENCY				400 ///< DDR 800
-#define DDR1066_FREQUENCY				533 ///< DDR 1066
-#define DDR1333_FREQUENCY				667 ///< DDR 1333
-#define DDR1600_FREQUENCY				800 ///< DDR 1600
-#define DDR1866_FREQUENCY				933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY		934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>
diff --git a/src/mainboard/amd/south_station/buildOpts.c b/src/mainboard/amd/south_station/buildOpts.c
index 29668bc..44248a2 100644
--- a/src/mainboard/amd/south_station/buildOpts.c
+++ b/src/mainboard/amd/south_station/buildOpts.c
@@ -167,29 +167,5 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY              200 ///< DDR 400
-#define DDR533_FREQUENCY              266 ///< DDR 533
-#define DDR667_FREQUENCY              333 ///< DDR 667
-#define DDR800_FREQUENCY              400 ///< DDR 800
-#define DDR1066_FREQUENCY             533 ///< DDR 1066
-#define DDR1333_FREQUENCY             667 ///< DDR 1333
-#define DDR1600_FREQUENCY             800 ///< DDR 1600
-#define DDR1866_FREQUENCY             933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY     934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED             0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED             1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO                0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED             1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC            2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL           0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT       1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>
diff --git a/src/mainboard/amd/thatcher/buildOpts.c b/src/mainboard/amd/thatcher/buildOpts.c
index c4e0fce..f9908ef 100644
--- a/src/mainboard/amd/thatcher/buildOpts.c
+++ b/src/mainboard/amd/thatcher/buildOpts.c
@@ -207,33 +207,6 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY   200     ///< DDR 400
-#define DDR533_FREQUENCY   266     ///< DDR 533
-#define DDR667_FREQUENCY   333     ///< DDR 667
-#define DDR800_FREQUENCY   400     ///< DDR 800
-#define DDR1066_FREQUENCY   533    ///< DDR 1066
-#define DDR1333_FREQUENCY   667    ///< DDR 1333
-#define DDR1600_FREQUENCY   800    ///< DDR 1600
-#define DDR1866_FREQUENCY   933    ///< DDR 1866
-#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/amd/union_station/buildOpts.c b/src/mainboard/amd/union_station/buildOpts.c
index 29668bc..44248a2 100644
--- a/src/mainboard/amd/union_station/buildOpts.c
+++ b/src/mainboard/amd/union_station/buildOpts.c
@@ -167,29 +167,5 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY              200 ///< DDR 400
-#define DDR533_FREQUENCY              266 ///< DDR 533
-#define DDR667_FREQUENCY              333 ///< DDR 667
-#define DDR800_FREQUENCY              400 ///< DDR 800
-#define DDR1066_FREQUENCY             533 ///< DDR 1066
-#define DDR1333_FREQUENCY             667 ///< DDR 1333
-#define DDR1600_FREQUENCY             800 ///< DDR 1600
-#define DDR1866_FREQUENCY             933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY     934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED             0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED             1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO                0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED             1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC            2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL           0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT       1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>
diff --git a/src/mainboard/asrock/e350m1/buildOpts.c b/src/mainboard/asrock/e350m1/buildOpts.c
index 6fba259..701d7ee 100644
--- a/src/mainboard/asrock/e350m1/buildOpts.c
+++ b/src/mainboard/asrock/e350m1/buildOpts.c
@@ -173,29 +173,5 @@
                   // This string MUST be exactly 12 characters long
 #define AGESA_VERSION_STRING  {'V', '0', '.', '0', '.', '0', '.', '1', ' ', ' ', ' ', ' '}

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY				200 ///< DDR 400
-#define DDR533_FREQUENCY				266 ///< DDR 533
-#define DDR667_FREQUENCY				333 ///< DDR 667
-#define DDR800_FREQUENCY				400 ///< DDR 800
-#define DDR1066_FREQUENCY				533 ///< DDR 1066
-#define DDR1333_FREQUENCY				667 ///< DDR 1333
-#define DDR1600_FREQUENCY				800 ///< DDR 1600
-#define DDR1866_FREQUENCY				933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY			934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC				2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL				0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT			1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>
diff --git a/src/mainboard/asrock/imb-a180/buildOpts.c b/src/mainboard/asrock/imb-a180/buildOpts.c
index 9145a17..3456121 100644
--- a/src/mainboard/asrock/imb-a180/buildOpts.c
+++ b/src/mainboard/asrock/imb-a180/buildOpts.c
@@ -205,33 +205,6 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-//#define DDR400_FREQUENCY   200     ///< DDR 400
-//#define DDR533_FREQUENCY   266     ///< DDR 533
-//#define DDR667_FREQUENCY   333     ///< DDR 667
-//#define DDR800_FREQUENCY   400     ///< DDR 800
-//#define DDR1066_FREQUENCY   533    ///< DDR 1066
-//#define DDR1333_FREQUENCY   667    ///< DDR 1333
-//#define DDR1600_FREQUENCY   800    ///< DDR 1600
-//#define DDR1866_FREQUENCY   933    ///< DDR 1866
-//#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-//#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-//#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-//#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-//
-///* QUANDRANK_TYPE */
-//#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-//#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-//
-///* USER_MEMORY_TIMING_MODE */
-//#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-//#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-//#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-//
-///* POWER_DOWN_MODE */
-//#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-//#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/asus/am1i-a/buildOpts.c b/src/mainboard/asus/am1i-a/buildOpts.c
index b57581f..d0a8a43 100644
--- a/src/mainboard/asus/am1i-a/buildOpts.c
+++ b/src/mainboard/asus/am1i-a/buildOpts.c
@@ -218,33 +218,6 @@
 // #define BLDCFG_FCH_GPP_PORT2_HOTPLUG          FALSE
 // #define BLDCFG_FCH_GPP_PORT3_HOTPLUG          FALSE

-/* MEMORY_BUS_SPEED */
-//#define DDR400_FREQUENCY   200     ///< DDR 400
-//#define DDR533_FREQUENCY   266     ///< DDR 533
-//#define DDR667_FREQUENCY   333     ///< DDR 667
-//#define DDR800_FREQUENCY   400     ///< DDR 800
-//#define DDR1066_FREQUENCY   533    ///< DDR 1066
-//#define DDR1333_FREQUENCY   667    ///< DDR 1333
-//#define DDR1600_FREQUENCY   800    ///< DDR 1600
-//#define DDR1866_FREQUENCY   933    ///< DDR 1866
-//#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-//#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-//#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-//#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-//
-///* QUANDRANK_TYPE */
-//#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-//#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-//
-///* USER_MEMORY_TIMING_MODE */
-//#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-//#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-//#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-//
-///* POWER_DOWN_MODE */
-//#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-//#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/asus/f2a85-m/buildOpts.c b/src/mainboard/asus/f2a85-m/buildOpts.c
index 13f2bd8..65731aa 100644
--- a/src/mainboard/asus/f2a85-m/buildOpts.c
+++ b/src/mainboard/asus/f2a85-m/buildOpts.c
@@ -207,33 +207,6 @@
 // #define BLDCFG_FCH_GPP_PORT2_HOTPLUG          FALSE
 // #define BLDCFG_FCH_GPP_PORT3_HOTPLUG          FALSE

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY   200     ///< DDR 400
-#define DDR533_FREQUENCY   266     ///< DDR 533
-#define DDR667_FREQUENCY   333     ///< DDR 667
-#define DDR800_FREQUENCY   400     ///< DDR 800
-#define DDR1066_FREQUENCY   533    ///< DDR 1066
-#define DDR1333_FREQUENCY   667    ///< DDR 1333
-#define DDR1600_FREQUENCY   800    ///< DDR 1600
-#define DDR1866_FREQUENCY   933    ///< DDR 1866
-#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/bap/ode_e20XX/buildOpts.c b/src/mainboard/bap/ode_e20XX/buildOpts.c
index a42bbca..d4c398a 100644
--- a/src/mainboard/bap/ode_e20XX/buildOpts.c
+++ b/src/mainboard/bap/ode_e20XX/buildOpts.c
@@ -205,33 +205,6 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-//#define DDR400_FREQUENCY   200     ///< DDR 400
-//#define DDR533_FREQUENCY   266     ///< DDR 533
-//#define DDR667_FREQUENCY   333     ///< DDR 667
-//#define DDR800_FREQUENCY   400     ///< DDR 800
-//#define DDR1066_FREQUENCY   533    ///< DDR 1066
-//#define DDR1333_FREQUENCY   667    ///< DDR 1333
-//#define DDR1600_FREQUENCY   800    ///< DDR 1600
-//#define DDR1866_FREQUENCY   933    ///< DDR 1866
-//#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-//#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-//#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-//#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-//
-///* QUANDRANK_TYPE */
-//#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-//#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-//
-///* USER_MEMORY_TIMING_MODE */
-//#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-//#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-//#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-//
-///* POWER_DOWN_MODE */
-//#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-//#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/biostar/a68n_5200/buildOpts.c b/src/mainboard/biostar/a68n_5200/buildOpts.c
index cd2aa2e..f5ac742 100644
--- a/src/mainboard/biostar/a68n_5200/buildOpts.c
+++ b/src/mainboard/biostar/a68n_5200/buildOpts.c
@@ -205,33 +205,6 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-//#define DDR400_FREQUENCY   200     ///< DDR 400
-//#define DDR533_FREQUENCY   266     ///< DDR 533
-//#define DDR667_FREQUENCY   333     ///< DDR 667
-//#define DDR800_FREQUENCY   400     ///< DDR 800
-//#define DDR1066_FREQUENCY   533    ///< DDR 1066
-//#define DDR1333_FREQUENCY   667    ///< DDR 1333
-//#define DDR1600_FREQUENCY   800    ///< DDR 1600
-//#define DDR1866_FREQUENCY   933    ///< DDR 1866
-//#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-//#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-//#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-//#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-//
-///* QUANDRANK_TYPE */
-//#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-//#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-//
-///* USER_MEMORY_TIMING_MODE */
-//#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-//#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-//#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-//
-///* POWER_DOWN_MODE */
-//#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-//#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/biostar/am1ml/buildOpts.c b/src/mainboard/biostar/am1ml/buildOpts.c
index 61cbf0f..54f9246 100644
--- a/src/mainboard/biostar/am1ml/buildOpts.c
+++ b/src/mainboard/biostar/am1ml/buildOpts.c
@@ -205,33 +205,6 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-//#define DDR400_FREQUENCY   200     ///< DDR 400
-//#define DDR533_FREQUENCY   266     ///< DDR 533
-//#define DDR667_FREQUENCY   333     ///< DDR 667
-//#define DDR800_FREQUENCY   400     ///< DDR 800
-//#define DDR1066_FREQUENCY   533    ///< DDR 1066
-//#define DDR1333_FREQUENCY   667    ///< DDR 1333
-//#define DDR1600_FREQUENCY   800    ///< DDR 1600
-//#define DDR1866_FREQUENCY   933    ///< DDR 1866
-//#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-//#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-//#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-//#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-//
-///* QUANDRANK_TYPE */
-//#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-//#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-//
-///* USER_MEMORY_TIMING_MODE */
-//#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-//#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-//#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-//
-///* POWER_DOWN_MODE */
-//#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-//#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/elmex/pcm205400/buildOpts.c b/src/mainboard/elmex/pcm205400/buildOpts.c
index 7fa480b..be07053 100644
--- a/src/mainboard/elmex/pcm205400/buildOpts.c
+++ b/src/mainboard/elmex/pcm205400/buildOpts.c
@@ -167,29 +167,5 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY				200 ///< DDR 400
-#define DDR533_FREQUENCY				266 ///< DDR 533
-#define DDR667_FREQUENCY				333 ///< DDR 667
-#define DDR800_FREQUENCY				400 ///< DDR 800
-#define DDR1066_FREQUENCY				533 ///< DDR 1066
-#define DDR1333_FREQUENCY				667 ///< DDR 1333
-#define DDR1600_FREQUENCY				800 ///< DDR 1600
-#define DDR1866_FREQUENCY				933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY		934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>
diff --git a/src/mainboard/gizmosphere/gizmo/buildOpts.c b/src/mainboard/gizmosphere/gizmo/buildOpts.c
index 66d1a74..91c2182 100644
--- a/src/mainboard/gizmosphere/gizmo/buildOpts.c
+++ b/src/mainboard/gizmosphere/gizmo/buildOpts.c
@@ -167,29 +167,5 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY				200 ///< DDR 400
-#define DDR533_FREQUENCY				266 ///< DDR 533
-#define DDR667_FREQUENCY				333 ///< DDR 667
-#define DDR800_FREQUENCY				400 ///< DDR 800
-#define DDR1066_FREQUENCY				533 ///< DDR 1066
-#define DDR1333_FREQUENCY				667 ///< DDR 1333
-#define DDR1600_FREQUENCY				800 ///< DDR 1600
-#define DDR1866_FREQUENCY				933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY		934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>
diff --git a/src/mainboard/gizmosphere/gizmo2/buildOpts.c b/src/mainboard/gizmosphere/gizmo2/buildOpts.c
index a42bbca..d4c398a 100644
--- a/src/mainboard/gizmosphere/gizmo2/buildOpts.c
+++ b/src/mainboard/gizmosphere/gizmo2/buildOpts.c
@@ -205,33 +205,6 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-//#define DDR400_FREQUENCY   200     ///< DDR 400
-//#define DDR533_FREQUENCY   266     ///< DDR 533
-//#define DDR667_FREQUENCY   333     ///< DDR 667
-//#define DDR800_FREQUENCY   400     ///< DDR 800
-//#define DDR1066_FREQUENCY   533    ///< DDR 1066
-//#define DDR1333_FREQUENCY   667    ///< DDR 1333
-//#define DDR1600_FREQUENCY   800    ///< DDR 1600
-//#define DDR1866_FREQUENCY   933    ///< DDR 1866
-//#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-//#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-//#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-//#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-//
-///* QUANDRANK_TYPE */
-//#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-//#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-//
-///* USER_MEMORY_TIMING_MODE */
-//#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-//#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-//#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-//
-///* POWER_DOWN_MODE */
-//#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-//#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/hp/abm/buildOpts.c b/src/mainboard/hp/abm/buildOpts.c
index 8efd0a2..1297484 100644
--- a/src/mainboard/hp/abm/buildOpts.c
+++ b/src/mainboard/hp/abm/buildOpts.c
@@ -210,33 +210,6 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-//#define DDR400_FREQUENCY   200     ///< DDR 400
-//#define DDR533_FREQUENCY   266     ///< DDR 533
-//#define DDR667_FREQUENCY   333     ///< DDR 667
-//#define DDR800_FREQUENCY   400     ///< DDR 800
-//#define DDR1066_FREQUENCY   533    ///< DDR 1066
-//#define DDR1333_FREQUENCY   667    ///< DDR 1333
-//#define DDR1600_FREQUENCY   800    ///< DDR 1600
-//#define DDR1866_FREQUENCY   933    ///< DDR 1866
-//#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-//#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-//#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-//#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-//
-///* QUANDRANK_TYPE */
-//#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-//#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-//
-///* USER_MEMORY_TIMING_MODE */
-//#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-//#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-//#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-//
-///* POWER_DOWN_MODE */
-//#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-//#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c b/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
index 19aac23..107c993 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
+++ b/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
@@ -208,33 +208,6 @@
 // #define BLDCFG_FCH_GPP_PORT2_HOTPLUG          FALSE
 // #define BLDCFG_FCH_GPP_PORT3_HOTPLUG          FALSE

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY   200     ///< DDR 400
-#define DDR533_FREQUENCY   266     ///< DDR 533
-#define DDR667_FREQUENCY   333     ///< DDR 667
-#define DDR800_FREQUENCY   400     ///< DDR 800
-#define DDR1066_FREQUENCY   533    ///< DDR 1066
-#define DDR1333_FREQUENCY   667    ///< DDR 1333
-#define DDR1600_FREQUENCY   800    ///< DDR 1600
-#define DDR1866_FREQUENCY   933    ///< DDR 1866
-#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c b/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
index 1e81f5b..3bc97ea 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
@@ -160,36 +160,6 @@
 #define BLDCFG_HEAP_DRAM_ADDRESS				0xB0000
 #define BLDCFG_CFG_TEMP_PCIE_MMIO_BASE_ADDRESS	0xD0000000

-/**
- * AGESA configuration values selection.
- * Uncomment and specify the value for the configuration options
- * needed by the system.
- */
-
-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY				200 /**< DDR 400 */
-#define DDR533_FREQUENCY				266 /**< DDR 533 */
-#define DDR667_FREQUENCY				333 /**< DDR 667 */
-#define DDR800_FREQUENCY				400 /**< DDR 800 */
-#define DDR1066_FREQUENCY				533 /**< DDR 1066 */
-#define DDR1333_FREQUENCY				667 /**< DDR 1333 */
-#define DDR1600_FREQUENCY				800 /**< DDR 1600 */
-#define DDR1866_FREQUENCY				933 /**< DDR 1866 */
-#define UNSUPPORTED_DDR_FREQUENCY		934 /**< Max limit of DDR frequency */
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 /**< Quadrank registered DIMM */
-#define QUADRANK_UNBUFFERED				1 /**< Quadrank unbuffered DIMM */
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 /**< Use best rate possible */
-#define TIMING_MODE_LIMITED				1 /**< Set user top limit */
-#define TIMING_MODE_SPECIFIC			2 /**< Set user specified speed */
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 /**< Channel power down mode */
-#define POWER_DOWN_BY_CHIP_SELECT		1 /**< Chip select power down mode */
-
 /* AGESA nonsense: this header depends on the definitions above */
 /* Instantiate all solution relevant data. */
 #include <PlatformInstall.h>
diff --git a/src/mainboard/lenovo/g505s/buildOpts.c b/src/mainboard/lenovo/g505s/buildOpts.c
index 92a1c69..c78c5c5 100644
--- a/src/mainboard/lenovo/g505s/buildOpts.c
+++ b/src/mainboard/lenovo/g505s/buildOpts.c
@@ -208,33 +208,6 @@
 // #define BLDCFG_FCH_GPP_PORT2_HOTPLUG          FALSE
 // #define BLDCFG_FCH_GPP_PORT3_HOTPLUG          FALSE

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY   200     ///< DDR 400
-#define DDR533_FREQUENCY   266     ///< DDR 533
-#define DDR667_FREQUENCY   333     ///< DDR 667
-#define DDR800_FREQUENCY   400     ///< DDR 800
-#define DDR1066_FREQUENCY   533    ///< DDR 1066
-#define DDR1333_FREQUENCY   667    ///< DDR 1333
-#define DDR1600_FREQUENCY   800    ///< DDR 1600
-#define DDR1866_FREQUENCY   933    ///< DDR 1866
-#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/lippert/frontrunner-af/buildOpts.c b/src/mainboard/lippert/frontrunner-af/buildOpts.c
index 66d1a74..91c2182 100644
--- a/src/mainboard/lippert/frontrunner-af/buildOpts.c
+++ b/src/mainboard/lippert/frontrunner-af/buildOpts.c
@@ -167,29 +167,5 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY				200 ///< DDR 400
-#define DDR533_FREQUENCY				266 ///< DDR 533
-#define DDR667_FREQUENCY				333 ///< DDR 667
-#define DDR800_FREQUENCY				400 ///< DDR 800
-#define DDR1066_FREQUENCY				533 ///< DDR 1066
-#define DDR1333_FREQUENCY				667 ///< DDR 1333
-#define DDR1600_FREQUENCY				800 ///< DDR 1600
-#define DDR1866_FREQUENCY				933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY		934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>
diff --git a/src/mainboard/lippert/toucan-af/buildOpts.c b/src/mainboard/lippert/toucan-af/buildOpts.c
index 66d1a74..91c2182 100644
--- a/src/mainboard/lippert/toucan-af/buildOpts.c
+++ b/src/mainboard/lippert/toucan-af/buildOpts.c
@@ -167,29 +167,5 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY				200 ///< DDR 400
-#define DDR533_FREQUENCY				266 ///< DDR 533
-#define DDR667_FREQUENCY				333 ///< DDR 667
-#define DDR800_FREQUENCY				400 ///< DDR 800
-#define DDR1066_FREQUENCY				533 ///< DDR 1066
-#define DDR1333_FREQUENCY				667 ///< DDR 1333
-#define DDR1600_FREQUENCY				800 ///< DDR 1600
-#define DDR1866_FREQUENCY				933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY		934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>
diff --git a/src/mainboard/msi/ms7721/buildOpts.c b/src/mainboard/msi/ms7721/buildOpts.c
index c7c4426..6185894 100644
--- a/src/mainboard/msi/ms7721/buildOpts.c
+++ b/src/mainboard/msi/ms7721/buildOpts.c
@@ -207,33 +207,6 @@
 // #define BLDCFG_FCH_GPP_PORT2_HOTPLUG          FALSE
 // #define BLDCFG_FCH_GPP_PORT3_HOTPLUG          FALSE

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY   200     ///< DDR 400
-#define DDR533_FREQUENCY   266     ///< DDR 533
-#define DDR667_FREQUENCY   333     ///< DDR 667
-#define DDR800_FREQUENCY   400     ///< DDR 800
-#define DDR1066_FREQUENCY   533    ///< DDR 1066
-#define DDR1333_FREQUENCY   667    ///< DDR 1333
-#define DDR1600_FREQUENCY   800    ///< DDR 1600
-#define DDR1866_FREQUENCY   933    ///< DDR 1866
-#define DDR2100_FREQUENCY   1050   ///< DDR 2100
-#define DDR2133_FREQUENCY   1066   ///< DDR 2133
-#define DDR2400_FREQUENCY   1200   ///< DDR 2400
-#define UNSUPPORTED_DDR_FREQUENCY		1201 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 /*
  * Agesa optional capabilities selection.
  * Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/pcengines/apu1/buildOpts.c b/src/mainboard/pcengines/apu1/buildOpts.c
index a810559..3a14ce5 100644
--- a/src/mainboard/pcengines/apu1/buildOpts.c
+++ b/src/mainboard/pcengines/apu1/buildOpts.c
@@ -167,29 +167,5 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"

-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY				200 ///< DDR 400
-#define DDR533_FREQUENCY				266 ///< DDR 533
-#define DDR667_FREQUENCY				333 ///< DDR 667
-#define DDR800_FREQUENCY				400 ///< DDR 800
-#define DDR1066_FREQUENCY				533 ///< DDR 1066
-#define DDR1333_FREQUENCY				667 ///< DDR 1333
-#define DDR1600_FREQUENCY				800 ///< DDR 1600
-#define DDR1866_FREQUENCY				933 ///< DDR 1866
-#define UNSUPPORTED_DDR_FREQUENCY		934 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED				0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED				1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO				0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED				1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC			2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL			0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT		1 ///< Chip select power down mode
-
 // Instantiate all solution relevant data.
 #include <PlatformInstall.h>
diff --git a/src/vendorcode/amd/agesa/f14/AGESA.h b/src/vendorcode/amd/agesa/f14/AGESA.h
index 047b037..03f1670 100644
--- a/src/vendorcode/amd/agesa/f14/AGESA.h
+++ b/src/vendorcode/amd/agesa/f14/AGESA.h
@@ -1015,37 +1015,37 @@
 } TECHNOLOGY_TYPE;

/// Build Configuration values for BLDCFG_MEMORY_BUS_FREQUENCY_LIMIT & BLDCFG_MEMORY_CLOCK_SELECT
-typedef enum {
-  DDR400_FREQUENCY = 200,     ///< DDR 400
-  DDR533_FREQUENCY = 266,     ///< DDR 533
-  DDR667_FREQUENCY = 333,     ///< DDR 667
-  DDR800_FREQUENCY = 400,     ///< DDR 800
-  DDR1066_FREQUENCY = 533,    ///< DDR 1066
-  DDR1333_FREQUENCY = 667,    ///< DDR 1333
-  DDR1600_FREQUENCY = 800,    ///< DDR 1600
-  DDR1866_FREQUENCY = 933,    ///< DDR 1866
-  UNSUPPORTED_DDR_FREQUENCY   ///< Highest limit of DDR frequency
-} MEMORY_BUS_SPEED;
+typedef unsigned int MEMORY_BUS_SPEED;
+
+#define DDR400_FREQUENCY		200 ///< DDR  400
+#define DDR533_FREQUENCY		266 ///< DDR  533
+#define DDR667_FREQUENCY		333 ///< DDR  667
+#define DDR800_FREQUENCY		400 ///< DDR  800
+#define DDR1066_FREQUENCY		533 ///< DDR 1066
+#define DDR1333_FREQUENCY		667 ///< DDR 1333
+#define DDR1600_FREQUENCY		800 ///< DDR 1600
+#define DDR1866_FREQUENCY		933 ///< DDR 1866
+#define UNSUPPORTED_DDR_FREQUENCY	934 ///< Highest limit of DDR frequency

/// Build Configuration values for BLDCFG_MEMORY_QUADRANK_TYPE
-typedef enum {
-  QUADRANK_REGISTERED,        ///< Quadrank registered DIMM
-  QUADRANK_UNBUFFERED         ///< Quadrank unbuffered DIMM
-} QUANDRANK_TYPE;
+typedef unsigned int QUANDRANK_TYPE;
+
+#define QUADRANK_REGISTERED		0 ///< Quadrank registered DIMM
+#define QUADRANK_UNBUFFERED		1 ///< Quadrank unbuffered DIMM

/// Build Configuration values for BLDCFG_TIMING_MODE_SELECT
-typedef enum {
-  TIMING_MODE_AUTO,           ///< Use best rate possible
-  TIMING_MODE_LIMITED,        ///< Set user top limit
-  TIMING_MODE_SPECIFIC        ///< Set user specified speed
-} USER_MEMORY_TIMING_MODE;
+typedef unsigned int USER_MEMORY_TIMING_MODE;
+
+#define TIMING_MODE_AUTO		0 ///< Use best rate possible
+#define TIMING_MODE_LIMITED		1 ///< Set user top limit
+#define TIMING_MODE_SPECIFIC		2 ///< Set user specified speed

/// Build Configuration values for BLDCFG_POWER_DOWN_MODE
-typedef enum {
-  POWER_DOWN_BY_CHANNEL,      ///< Channel power down mode
-  POWER_DOWN_BY_CHIP_SELECT,  ///< Chip select power down mode
-  POWER_DOWN_MODE_AUTO        ///< AGESA to select power down mode
-} POWER_DOWN_MODE;
+typedef unsigned int POWER_DOWN_MODE;
+
+#define POWER_DOWN_BY_CHANNEL		0 ///< Channel power down mode
+#define POWER_DOWN_BY_CHIP_SELECT	1 ///< Chip select power down mode
+#define POWER_DOWN_MODE_AUTO		2 ///< AGESA to select power down mode

/// Low voltage support
 typedef enum {
diff --git a/src/vendorcode/amd/agesa/f15tn/AGESA.h b/src/vendorcode/amd/agesa/f15tn/AGESA.h
index 3ac9071..922a8ee 100644
--- a/src/vendorcode/amd/agesa/f15tn/AGESA.h
+++ b/src/vendorcode/amd/agesa/f15tn/AGESA.h
@@ -1382,40 +1382,40 @@
 } TECHNOLOGY_TYPE;

/// Build Configuration values for BLDCFG_MEMORY_BUS_FREQUENCY_LIMIT & BLDCFG_MEMORY_CLOCK_SELECT
-typedef enum {
-  DDR400_FREQUENCY = 200,     ///< DDR 400
-  DDR533_FREQUENCY = 266,     ///< DDR 533
-  DDR667_FREQUENCY = 333,     ///< DDR 667
-  DDR800_FREQUENCY = 400,     ///< DDR 800
-  DDR1066_FREQUENCY = 533,    ///< DDR 1066
-  DDR1333_FREQUENCY = 667,    ///< DDR 1333
-  DDR1600_FREQUENCY = 800,    ///< DDR 1600
-  DDR1866_FREQUENCY = 933,    ///< DDR 1866
-  DDR2100_FREQUENCY = 1050,   ///< DDR 2100
-  DDR2133_FREQUENCY = 1066,   ///< DDR 2133
-  DDR2400_FREQUENCY = 1200,   ///< DDR 2400
-  UNSUPPORTED_DDR_FREQUENCY   ///< Highest limit of DDR frequency
-} MEMORY_BUS_SPEED;
+typedef unsigned int MEMORY_BUS_SPEED;
+
+#define DDR400_FREQUENCY		 200 ///< DDR  400
+#define DDR533_FREQUENCY		 266 ///< DDR  533
+#define DDR667_FREQUENCY		 333 ///< DDR  667
+#define DDR800_FREQUENCY		 400 ///< DDR  800
+#define DDR1066_FREQUENCY		 533 ///< DDR 1066
+#define DDR1333_FREQUENCY		 667 ///< DDR 1333
+#define DDR1600_FREQUENCY		 800 ///< DDR 1600
+#define DDR1866_FREQUENCY		 933 ///< DDR 1866
+#define DDR2100_FREQUENCY		1050 ///< DDR 2100
+#define DDR2133_FREQUENCY		1066 ///< DDR 2133
+#define DDR2400_FREQUENCY		1200 ///< DDR 2400
+#define UNSUPPORTED_DDR_FREQUENCY	1201 ///< Highest limit of DDR frequency

/// Build Configuration values for BLDCFG_MEMORY_QUADRANK_TYPE
-typedef enum {
-  QUADRANK_REGISTERED,        ///< Quadrank registered DIMM
-  QUADRANK_UNBUFFERED         ///< Quadrank unbuffered DIMM
-} QUANDRANK_TYPE;
+typedef unsigned int QUANDRANK_TYPE;
+
+#define QUADRANK_REGISTERED		0 ///< Quadrank registered DIMM
+#define QUADRANK_UNBUFFERED		1 ///< Quadrank unbuffered DIMM

/// Build Configuration values for BLDCFG_TIMING_MODE_SELECT
-typedef enum {
-  TIMING_MODE_AUTO,           ///< Use best rate possible
-  TIMING_MODE_LIMITED,        ///< Set user top limit
-  TIMING_MODE_SPECIFIC        ///< Set user specified speed
-} USER_MEMORY_TIMING_MODE;
+typedef unsigned int USER_MEMORY_TIMING_MODE;
+
+#define TIMING_MODE_AUTO		0 ///< Use best rate possible
+#define TIMING_MODE_LIMITED		1 ///< Set user top limit
+#define TIMING_MODE_SPECIFIC		2 ///< Set user specified speed

/// Build Configuration values for BLDCFG_POWER_DOWN_MODE
-typedef enum {
-  POWER_DOWN_BY_CHANNEL,      ///< Channel power down mode
-  POWER_DOWN_BY_CHIP_SELECT,  ///< Chip select power down mode
-  POWER_DOWN_MODE_AUTO        ///< AGESA to select power down mode
-} POWER_DOWN_MODE;
+typedef unsigned int POWER_DOWN_MODE;
+
+#define POWER_DOWN_BY_CHANNEL		0 ///< Channel power down mode
+#define POWER_DOWN_BY_CHIP_SELECT	1 ///< Chip select power down mode
+#define POWER_DOWN_MODE_AUTO		2 ///< AGESA to select power down mode

/// Low voltage support
 typedef enum {

[9elements QA (Code Review)]

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41666 )

Change subject: AGESA f14/f15tn/f16kb: Deduplicate RAM settings
......................................................................

Patch Set 6:

Automatic boot test returned (PASS/FAIL/TOTAL): 4/0/4
Emulation targets:
"QEMU x86 q35/ich9" using payload TianoCore : SUCCESS : https://lava.9esec.io/r/4003
"QEMU x86 q35/ich9" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4002
"QEMU x86 i440fx/piix4" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4001
"QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/4000

Please note: This test is under development and might not be accurate at all!

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41666 )

Change subject: AGESA f14/f15tn/f16kb: Deduplicate RAM settings
......................................................................

Patch Set 6:
> Patch Set 5: Code-Review+2
>
> Would have been fun to change the include order... I guess the
> compiler would have seen things like
> typedef enum {
>         200 = 200,
>         ...

Yes, it would... I had something like that happen with a macro parameter when doing the IOSAV API patches...