Change in coreboot[master]: soc/intel/common: Remove use of CPUID_EXTENDED_CPU_TOPOLOGY_V2

[Subrata Banik (Code Review)]

Attention is currently required from: V Sowmya, Saurabh Mishra, Kangheui Won, [e-mail], Paul Menzel, Rizwan Qureshi, Reka Norman, Krishna P Bhat D, Ronak Kanabar, Usha P.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62323 )

Change subject: soc/intel/common: Remove use of CPUID_EXTENDED_CPU_TOPOLOGY_V2
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Patch Set 7:

(5 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/62323/comment/3070aff1_0a7d405b 
PS7, Line 26: which is expecting data for CPUID_EXTENDED_CPU_TOPOLOGY
sorry! who is expecting data using v1 structure ? FSP?

Do that mean, ADL-Ncpu (Atoms) doesn't support v2 hence, better to pass v1 data structure which is unified.

https://review.coreboot.org/c/coreboot/+/62323/comment/e7129454_ada427f8 
PS7, Line 23: FSP queries coreboot MP services to get CPU topology data which uses
            : structure which is either compatible with CPUID_EXTENDED_CPU_TOPOLOGY or
            : CPUID_EXTENDED_CPU_TOPOLOGY_V2. Since coreboot returns V2 data in
            : structure which is expecting data for CPUID_EXTENDED_CPU_TOPOLOGY, there
            : is hang observed on ADL_N CPUs.
            : 
this part is not very clear to me.

This issue is seen with ADL-N and not ADL-P (please correct me if wrong) then, FSP is same between ADL-P and ADL-N, in that case why expectation in FSP would be different compared to ADL-P?

https://review.coreboot.org/c/coreboot/+/62323/comment/bdb2c4bc_c0e8bc65 
PS7, Line 33: Ref EDK2 code: https://github.com/tianocore/edk2/tree/edk2-stable202202
            : Files:
            : MdePkg/Include/Protocol/MpService.h#L182
            : UefiCpuPkg/Library/MpInitLib/MpLib.c#L2127
            : UefiCpuPkg/Library/MpInitLib/MpLib.c#L2120
I don't think, we have any guideline that says, "write the code based on EDKII" 😊 
Not sure if pointing to EDKII code is helpful here?

https://review.coreboot.org/c/coreboot/+/62323/comment/1b479fc9_164c038f 
PS7, Line 41: ADL-N RVP
where is testing data about ADL-P? you are changing behaviour for ADL-P as well. Did you see any issue with Brya devices ?

https://review.coreboot.org/c/coreboot/+/62323/comment/03f08eb4_3857c253 
PS7, Line 42: (no hang)
IMO, what is the root-cause is still missing.