Tim Wawrzynczak has submitted this change. ( https://review.coreboot.org/c/coreboot/+/54383 )
Change subject: mb/google/brya: Disable dynamic GPIO PM for community 3 ......................................................................
mb/google/brya: Disable dynamic GPIO PM for community 3
We recently added GPIO definition for PCIE vGPIO for Alder Lake. We also need to disable GPIO dynamic PM for this community which is already done for other communities as well.
BUG=b:188392183 BRANCH=None TEST=Code compiles and Check if dynamic PM for GPIO COMM3 is also disabled
Change-Id: I2f8645b8f4a9995e727a7623af97531c5de52892 Signed-off-by: Maulik V Vaghela maulik.v.vaghela@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/54383 Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/brya/variants/baseboard/devicetree.cb 1 file changed, 1 insertion(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/mainboard/google/brya/variants/baseboard/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/devicetree.cb index 5f73671..cabbeea 100644 --- a/src/mainboard/google/brya/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/devicetree.cb @@ -35,6 +35,7 @@ register "gpio_pm[COMM_0]" = "0" register "gpio_pm[COMM_1]" = "0" register "gpio_pm[COMM_2]" = "0" + register "gpio_pm[COMM_3]" = "0" register "gpio_pm[COMM_4]" = "0" register "gpio_pm[COMM_5]" = "0"
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Tim Wawrzynczak (Code Review)