Andrey Petrov (andrey.petrov@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13372
-gerrit
commit 2368ad5f76bb61612d54b098d781bf2260feeda5 Author: Zhao, Lijian lijian.zhao@intel.com Date: Wed Dec 2 17:06:54 2015 -0800
mainboard/intel/apollolake_rvp: Include SOC ASL
Include northbridge ASL file into board DSDT table.
Change-Id: I33903a9c281e4981bd0f226c22553e22f98075bc Signed-off-by: Zhao, Lijian lijian.zhao@intel.com --- src/mainboard/intel/apollolake_rvp/dsdt.asl | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mainboard/intel/apollolake_rvp/dsdt.asl b/src/mainboard/intel/apollolake_rvp/dsdt.asl index 1736cea..7482d31 100644 --- a/src/mainboard/intel/apollolake_rvp/dsdt.asl +++ b/src/mainboard/intel/apollolake_rvp/dsdt.asl @@ -22,7 +22,8 @@ DefinitionBlock( Scope (_SB) { Device (PCI0) { - Name (_HID, EISAID ("PNP0A08")) /* PCIe */ + #include <soc/intel/apollolake/acpi/northbridge.asl> + #include <soc/intel/apollolake/acpi/southbridge.asl> } }