Change in coreboot[master]: soc/intel/common/../car: Calculate SF Mask#1 based on MSR 0xc87

[Tim Wawrzynczak (Code Review)]

Attention is currently required from: Furquan Shaikh, Subrata Banik, Nick Vaccaro, EricR Lai.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51374 )

Change subject: soc/intel/common/../car: Calculate SF Mask#1 based on MSR 0xc87
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Patch Set 5:

(1 comment)

File src/soc/intel/common/block/cpu/car/cache_as_ram.S:

https://review.coreboot.org/c/coreboot/+/51374/comment/f290d5db_0b1d324b 
PS5, Line 524: (1 << data_ways)
> i guess better we accommodate this 1 << data_ways in below code as well?

If that is how the register should be programmed, then yeah I guess so 😊

Looking again, shouldn't the logic actually be:
`(1 << (SFWayCnt - data_ways)) - 1`

which would also simplify the flow; it should only add 1 (maybe 2) instructions, a load and a subtraction