Change in coreboot[master]: soc/amd/cezanne: Add uart controllers to chipset.cb - coreboot-gerrit

13 Apr 2021


      Attention is currently required from: Jason Glenesk, Furquan Shaikh, Marshall Dawson, Ivy Jian, Felix Held.
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52287 )
Change subject: soc/amd/cezanne: Add uart controllers to chipset.cb
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Patch Set 1:
(1 comment)
File src/soc/amd/cezanne/chipset.cb:
https://review.coreboot.org/c/coreboot/+/52287/comment/85399f09_9140c2bc 
PS1, Line 110: off
...
The chipset tree typically sets the default as "off" for devices that are not necessarily required f […]
That's fine. 
Can you push CLs to enable uart_0 for majolica and mancomb. I don't want to break existing boards.
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Iaeb7fea4b92bd89331c7ae7c1c000f8d9961fe9e
Gerrit-Change-Number: 52287
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