Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47252 )
Change subject: mb/purism/librem_mini: drop PcieRpSlotImplemented from LAN PCIe ......................................................................
mb/purism/librem_mini: drop PcieRpSlotImplemented from LAN PCIe
The LAN NIC is onboard, not installed in a slot.
Change-Id: I77ee7ee8c944b7942ca78d35cd881277c4030ab9 Signed-off-by: Matt DeVillier matt.devillier@puri.sm --- M src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb 1 file changed, 0 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/47252/1
diff --git a/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb b/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb index 1a1c466..9b231a8 100644 --- a/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb +++ b/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb @@ -202,7 +202,6 @@ device pci 1d.0 off end # PCI Express Port 9 device pci 1d.1 on # PCI Express Port 10 device pci 00.0 on end # x1 (LAN) - register "PcieRpSlotImplemented[9]" = "1" register "PcieRpEnable[9]" = "1" register "PcieClkSrcUsage[3]" = "9" register "PcieClkSrcClkReq[3]" = "3"
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47252 )
Change subject: mb/purism/librem_mini: drop PcieRpSlotImplemented from LAN PCIe ......................................................................
Patch Set 1: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47252 )
Change subject: mb/purism/librem_mini: drop PcieRpSlotImplemented from LAN PCIe ......................................................................
Patch Set 1: Code-Review+2
Michael Niewöhner has uploaded a new patch set (#2) to the change originally created by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/47252 )
Change subject: mb/purism/librem_mini: drop PcieRpSlotImplemented from LAN PCIe ......................................................................
mb/purism/librem_mini: drop PcieRpSlotImplemented from LAN PCIe
The LAN NIC is onboard, not installed in a slot.
Change-Id: I77ee7ee8c944b7942ca78d35cd881277c4030ab9 Signed-off-by: Matt DeVillier matt.devillier@puri.sm --- M src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb 1 file changed, 0 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/47252/2
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47252 )
Change subject: mb/purism/librem_mini: drop PcieRpSlotImplemented from LAN PCIe ......................................................................
Patch Set 2:
retriggered the buildbot
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47252 )
Change subject: mb/purism/librem_mini: drop PcieRpSlotImplemented from LAN PCIe ......................................................................
mb/purism/librem_mini: drop PcieRpSlotImplemented from LAN PCIe
The LAN NIC is onboard, not installed in a slot.
Change-Id: I77ee7ee8c944b7942ca78d35cd881277c4030ab9 Signed-off-by: Matt DeVillier matt.devillier@puri.sm Reviewed-on: https://review.coreboot.org/c/coreboot/+/47252 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Michael Niewöhner foss@mniewoehner.de Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb 1 file changed, 0 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Michael Niewöhner: Looks good to me, approved
diff --git a/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb b/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb index e2135b7..e8cc1e4 100644 --- a/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb +++ b/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb @@ -202,7 +202,6 @@ device pci 1d.0 off end # PCI Express Port 9 device pci 1d.1 on # PCI Express Port 10 device pci 00.0 on end # x1 (LAN) - register "PcieRpSlotImplemented[9]" = "1" register "PcieRpEnable[9]" = "1" register "PcieClkSrcUsage[3]" = "9" register "PcieClkSrcClkReq[3]" = "3"