[XS] Change in coreboot[main]: soc/intel/common/cse: Skip CSE state setting with LITE_SYNC_BY_PAYLOAD

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87266?usp=email )

Change subject: soc/intel/common/cse: Skip CSE state setting with LITE_SYNC_BY_PAYLOAD
......................................................................

soc/intel/common/cse: Skip CSE state setting with LITE_SYNC_BY_PAYLOAD

This commit introduces a conditional bypass for ME state setting,
potentially reducing CBFS traversal time when searching for the
`option/me_state` file.

TEST=Able to build and boot google/fatcat.

Change-Id: I43f5daab450989307d9b3529949e9f03cba4404d
Signed-off-by: Subrata Banik 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87266
Reviewed-by: Jérémy Compostella 
Reviewed-by: Kapil Porwal 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/common/block/cse/cse.c
1 file changed, 3 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Jérémy Compostella: Looks good to me, approved
  Kapil Porwal: Looks good to me, approved

diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c
index 2e0f2db..68d0c21 100644
--- a/src/soc/intel/common/block/cse/cse.c
+++ b/src/soc/intel/common/block/cse/cse.c
@@ -1298,6 +1298,9 @@

static void cse_set_state(struct device *dev)
 {
+	if (CONFIG(SOC_INTEL_CSE_LITE_SYNC_BY_PAYLOAD))
+		return;
+
    /* (CS)ME Disable Command */
    struct me_disable_command {
    	struct mkhi_hdr hdr;