Attention is currently required from: Hung-Te Lin, Nico Huber, Paul Menzel, Yidi Lin, Yu-Ping Wu.
Jianjun Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78044?usp=email )
Change subject: soc/mediatek: PCI: Fix translation window ......................................................................
Patch Set 11:
(9 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/78044/comment/4d8191cb_4c5e2c89 : PS8, Line 15: split
splitting
Done
https://review.coreboot.org/c/coreboot/+/78044/comment/e21629f6_e86cee2c : PS8, Line 16:
is
Done
File src/soc/mediatek/common/pcie.c:
https://review.coreboot.org/c/coreboot/+/78044/comment/bb2d9c98_f9f5edf4 : PS8, Line 130: uint32_t count
`size_t *count`. And modify it in-place.
Done
https://review.coreboot.org/c/coreboot/+/78044/comment/114c519a_954fc379 : PS8, Line 142: if (count >= PCIE_MAX_TRANS_TABLES) { : printk(BIOS_ERR, "%s: Not enough traslate table\n", __func__); : return -1; : }
As this is already checked in the while loop condition, this can be removed here.
Done
https://review.coreboot.org/c/coreboot/+/78044/comment/97668a52_c827508e : PS8, Line 166: 0x1000
4 * KiB
Done
https://review.coreboot.org/c/coreboot/+/78044/comment/82b4af6a_00fee162 : PS8, Line 171:
Move the `if (size < 0x1000)` check here, and return -1 in that case. […]
Done
https://review.coreboot.org/c/coreboot/+/78044/comment/9ffdc073_1075fede : PS8, Line 174: __fls
Actually, this extra `__fls` is not needed if we change the definition of `size`: […]
We still need the 'size' to calculate addresses.
https://review.coreboot.org/c/coreboot/+/78044/comment/e2ed94e0_1e9d050d : PS8, Line 178: write32p(table + PCIE_ATR_TRSL_PARAM_OFFSET, table_attr);
Now that this function is a bit long. Can we extract the write32p calls to a function: […]
Done
https://review.coreboot.org/c/coreboot/+/78044/comment/0c21a627_1ce6b5a4 : PS8, Line 181: "%s:
Align with `BIOS_INFO` above.
Done