[S] Change in coreboot[main]: soc/amd/non_car/memlayout_x86.ld: Top align the code

[Arthur Heymans (Code Review)]

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Martin L Roth, Martin Roth, Matt DeVillier.

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81433?usp=email )

Change subject: soc/amd/non_car/memlayout_x86.ld: Top align the code
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Patch Set 1:

(4 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/81433/comment/7bf0ae67_32c03e22 :
PS1, Line 26: bootlbock
> bootblock

Done

File src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld:

https://review.coreboot.org/c/coreboot/+/81433/comment/72399355_ea2680be :
PS1, Line 128: 64K
> I thought the whole point of this was that we didn't know the length, and it could be up to 128K with the next patch. I'm probably overlooking something, but this confuses me.

So this section is about the code that is run in 16bit mode. It all needs to reside in that 64K segment in which the reset vector at IP 0xfff0 is. All the other 32/64bit code does not have this restriction.

I'll add a comment to clarify.

https://review.coreboot.org/c/coreboot/+/81433/comment/8c854f57_f8b748e5 :
PS1, Line 132: /* Trigger an error if I have an unusable start address */
> We got rid of the assert, so remove this comment?

Done

https://review.coreboot.org/c/coreboot/+/81433/comment/44ea3daa_85176715 :
PS1, Line 135: . = ALIGN(4096);
> do we want a `. […]

Done