[M] Change in libgfxinit[master]: [EXPERIMENTAL] Begin Meteor Lake integration

[Jérémy Compostella (Code Review)]

Jérémy Compostella has uploaded this change for review. ( https://review.coreboot.org/c/libgfxinit/+/72714 )

Change subject: [EXPERIMENTAL] Begin Meteor Lake integration
......................................................................

[EXPERIMENTAL] Begin Meteor Lake integration

MeteoLake is gen 14 which is another generation (compared to Tigerlake
12) but according to the GOP team, changes are minimal. Therefore,
this patch does NOT create a new Gen_Meteorlake.

On the first run the board got stuck on

common/tigerlake/hw-gfx-gma-power_and_clocks.adb::Get_RawClk()
It turns that it hangs on Registers.SFUSE_STRAP. According to the
https://patchwork.freedesktop.org/patch/499261/ i915 driver change:

MTL has a fixed rawclk of 38400Khz. Register does not need to be
   reprogrammed.

So I made Get_RawClk() return 38_400_000 on MTL. The commit message
also states that it does not need to be reprogrammed and that's
something I have not looked in and that may be something worth looking
at. Nevertheless, with this change the board gets further and at least
isn't stuck.

Change-Id: I890b32497af8edc82dd533e5c556e30ec50d0d04
Signed-off-by: Jeremy Compostella 
---
M common/hw-gfx-gma-config.ads.template
M common/hw-gfx-gma.ads
M common/tigerlake/hw-gfx-gma-power_and_clocks.adb
3 files changed, 55 insertions(+), 11 deletions(-)

git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/14/72714/1

diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template
index 8a39618..7ab5071 100644
--- a/common/hw-gfx-gma-config.ads.template
+++ b/common/hw-gfx-gma-config.ads.template
@@ -31,7 +31,7 @@
          when Haswell   => Broadwell,
          when Broxton   => Broxton,
          when Skylake   => Kabylake,
-         when Tigerlake => Alderlake);
+         when Tigerlake => Meteorlake);
    CPU_Var_Last : constant CPU_Variant :=
      (case Gen is
          when Haswell | Skylake | Tigerlake  => ULX,
@@ -161,6 +161,7 @@
    CPU_Kabylake      : <sklbool> := Gen_Skylake and then CPU = Kabylake;
    CPU_Tigerlake     : <tglbool> := Gen_Tigerlake and then CPU = Tigerlake;
    CPU_Alderlake     : <tglbool> := Gen_Tigerlake and then CPU = Alderlake;
+   CPU_Meteorlake    : <tglbool> := Gen_Tigerlake and then CPU = Meteorlake;

Sandybridge_On    : <ilkbool> :=
      ((Gen_Ironlake and then CPU >= Sandybridge) or Haswell_On);
@@ -566,6 +567,9 @@
       Is_Alder_Lake_N (Device_Id) or
       Is_Raptor_Lake_P (Device_Id));

+   function Is_Meteor_Lake (Device_ID : Word16) return Boolean is
+     (Device_Id = 16#7d45#);
+
    function Is_GPU (Device_Id : Word16; CPU : CPU_Type; CPU_Var : CPU_Variant)
       return Boolean is
      (case CPU is
@@ -609,7 +613,12 @@
                            when Normal =>
    			   False,
    			when ULT | ULX =>
-				   Is_Alder_Lake (Device_ID)));
+				   Is_Alder_Lake (Device_ID)),
+         when Meteorlake    => (case CPU_Var is
+	                        when Normal =>
+				   False,
+				when ULT | ULX =>
+				   Is_Meteor_Lake (Device_ID)));

function Compatible_GPU (Device_Id : Word16) return Boolean is
      (Is_GPU (Device_Id, CPU, CPU_Var));
diff --git a/common/hw-gfx-gma.ads b/common/hw-gfx-gma.ads
index 1c589d0..54e24be 100644
--- a/common/hw-gfx-gma.ads
+++ b/common/hw-gfx-gma.ads
@@ -49,7 +49,8 @@
       Skylake,
       Kabylake,
       Tigerlake,
-      Alderlake);
+      Alderlake,
+      Meteorlake);

type CPU_Variant is (Normal, ULT, ULX);

@@ -61,7 +62,8 @@
       Sunrise_Point,    -- Union Point compatible
       Cannon_Point,
       Tiger_Point,
-      Alder_Point);
+      Alder_Point,
+      Meteor_Point);

type Port_Type is
      (Disabled,
diff --git a/common/tigerlake/hw-gfx-gma-power_and_clocks.adb b/common/tigerlake/hw-gfx-gma-power_and_clocks.adb
index a01a89d..570eb1a 100644
--- a/common/tigerlake/hw-gfx-gma-power_and_clocks.adb
+++ b/common/tigerlake/hw-gfx-gma-power_and_clocks.adb
@@ -133,14 +133,18 @@
       Raw_Frequency_24_MHz : Boolean;
       SFUSE_STRAP_RAW_FREQUENCY : constant := 1 * 2 ** 8;
    begin
-      Rawclk := Config.Default_RawClk_Freq;
-      Registers.Is_Set_Mask
-        (Register => Registers.SFUSE_STRAP,
-         Mask     => SFUSE_STRAP_RAW_FREQUENCY,
-         Result   => Raw_Frequency_24_MHz);
+      if Config.CPU_Meteorlake then
+         Rawclk := 38_400_000;
+      else
+         Rawclk := Config.Default_RawClk_Freq;
+         Registers.Is_Set_Mask
+           (Register => Registers.SFUSE_STRAP,
+            Mask     => SFUSE_STRAP_RAW_FREQUENCY,
+            Result   => Raw_Frequency_24_MHz);

-      if not Raw_Frequency_24_MHz then
-         Rawclk := 19_200_000;
+         if not Raw_Frequency_24_MHz then
+            Rawclk := 38_400_000;
+         end if;
       end if;
    end Get_RawClk;