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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64189?usp=email )
Change subject: haswell NRI: Add DDR3 JEDEC reset and init
......................................................................
Patch Set 5:
(1 comment)
This change is ready for review.
File src/northbridge/intel/haswell/native_raminit/jedec_reset.c:
https://review.coreboot.org/c/coreboot/+/64189/comment/ee0c7e26_af60696c :
PS1, Line 85: 0
Use the enum!
Done
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