[XS] Change in coreboot[main]: sandybridge,haswell,broadwell: Use DIV_ROUND_CLOSEST macro

[Nico Huber (Code Review)]

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52651?usp=email )

Change subject: sandybridge,haswell,broadwell: Use DIV_ROUND_CLOSEST macro
......................................................................

sandybridge,haswell,broadwell: Use DIV_ROUND_CLOSEST macro

Integer division in C truncates toward zero. When the dividend and the
divisor are positive, one can add half of the divisor to the dividend to
round the division result towards the closest integer. We already have a
macro in commonlib to do just that, so put it to good use.

Tested with BUILD_TIMELESS=1, coreboot images for the Asus P8Z77-V LX2
and the Asrock B85M Pro4 do not change.

Change-Id: I251af82da15049a3a2aa6ea712ae8c9fe859caf6
Signed-off-by: Angel Pons 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52651
Reviewed-by: Nico Huber 
Reviewed-by: Benjamin Doron 
Tested-by: build bot (Jenkins) 
---
M src/northbridge/intel/haswell/haswell_mrc/raminit.c
M src/northbridge/intel/sandybridge/raminit_shared.c
M src/soc/intel/broadwell/raminit.c
3 files changed, 4 insertions(+), 3 deletions(-)

Approvals:
  Nico Huber: Looks good to me, approved
  build bot (Jenkins): Verified
  Benjamin Doron: Looks good to me, approved

diff --git a/src/northbridge/intel/haswell/haswell_mrc/raminit.c b/src/northbridge/intel/haswell/haswell_mrc/raminit.c
index f23e40d..7109e46 100644
--- a/src/northbridge/intel/haswell/haswell_mrc/raminit.c
+++ b/src/northbridge/intel/haswell/haswell_mrc/raminit.c
@@ -73,7 +73,7 @@
    const u32 addr_decoder_common = mchbar_read32(MAD_CHNL);

printk(BIOS_DEBUG, "memcfg DDR3 clock %d MHz\n",
-	       (mchbar_read32(MC_BIOS_DATA) * 13333 * 2 + 50) / 100);
+	       DIV_ROUND_CLOSEST(mchbar_read32(MC_BIOS_DATA) * 13333 * 2, 100));

printk(BIOS_DEBUG, "memcfg channel assignment: A: %d, B % d, C % d\n",
           (addr_decoder_common >> 0) & 3,
diff --git a/src/northbridge/intel/sandybridge/raminit_shared.c b/src/northbridge/intel/sandybridge/raminit_shared.c
index 543d285..8ba20ac 100644
--- a/src/northbridge/intel/sandybridge/raminit_shared.c
+++ b/src/northbridge/intel/sandybridge/raminit_shared.c
@@ -29,7 +29,7 @@

printk(BIOS_DEBUG, "memcfg DDR3 ref clock %d MHz\n", refclk);
    printk(BIOS_DEBUG, "memcfg DDR3 clock %d MHz\n",
-	       (mchbar_read32(MC_BIOS_DATA) * refclk * 100 * 2 + 50) / 100);
+	       DIV_ROUND_CLOSEST(mchbar_read32(MC_BIOS_DATA) * refclk * 100 * 2, 100));

printk(BIOS_DEBUG, "memcfg channel assignment: A: %d, B % d, C % d\n",
           (addr_decoder_common >> 0) & 3,
diff --git a/src/soc/intel/broadwell/raminit.c b/src/soc/intel/broadwell/raminit.c
index c55e755..cacf8ecc 100644
--- a/src/soc/intel/broadwell/raminit.c
+++ b/src/soc/intel/broadwell/raminit.c
@@ -16,6 +16,7 @@
 #include <soc/romstage.h>
 #include <soc/systemagent.h>
 #include <timestamp.h>
+#include <types.h>

static void save_mrc_data(struct pei_data *pei_data)
 {
@@ -46,7 +47,7 @@
    const u32 addr_decoder_common = mchbar_read32(MAD_CHNL);

printk(BIOS_DEBUG, "memcfg DDR3 clock %d MHz\n",
-	       (mchbar_read32(MC_BIOS_DATA) * 13333 * 2 + 50) / 100);
+	       DIV_ROUND_CLOSEST(mchbar_read32(MC_BIOS_DATA) * 13333 * 2, 100));

printk(BIOS_DEBUG, "memcfg channel assignment: A: %d, B % d, C % d\n",
           (addr_decoder_common >> 0) & 3,