Change in coreboot[master]: soc/intel/skylake: Enable CHAP device depending on devicetree

[Hung-Te Lin (Code Review)]

Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48323 )

Change subject: soc/intel/skylake: Enable CHAP device depending on devicetree
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soc/intel/skylake: Enable CHAP device depending on devicetree

Now that CHAP device is declared in chipset devicetree, hook it up to
devicetree configuration.

Change-Id: Icc51f7b9cda32d5058dce958e386921b6d3d8ffb
Signed-off-by: Benjamin Doron 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48323
Reviewed-by: Michael Niewöhner 
Reviewed-by:  Felix Singer 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/skylake/chip.c
M src/soc/intel/skylake/include/soc/pci_devs.h
2 files changed, 7 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
   Felix Singer: Looks good to me, approved
  Michael Niewöhner: Looks good to me, approved

diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index ef16f38..2707353 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -247,6 +247,9 @@
    dev = pcidev_path_on_root(SA_DEVFN_IMGU);
    params->SaImguEnable = dev && dev->enabled;

+	dev = pcidev_path_on_root(SA_DEVFN_CHAP);
+	tconfig->ChapDeviceEnable = dev && dev->enabled;
+
    dev = pcidev_path_on_root(PCH_DEVFN_CSE_3);
    params->Heci3Enabled = dev && dev->enabled;

diff --git a/src/soc/intel/skylake/include/soc/pci_devs.h b/src/soc/intel/skylake/include/soc/pci_devs.h
index 319a12b..661ed5c 100644
--- a/src/soc/intel/skylake/include/soc/pci_devs.h
+++ b/src/soc/intel/skylake/include/soc/pci_devs.h
@@ -42,6 +42,10 @@
 #define  SA_DEVFN_IMGU		PCI_DEVFN(SA_DEV_SLOT_IMGU, 0)
 #define  SA_DEV_IMGU		PCI_DEV(0, SA_DEV_SLOT_IMGU, 0)

+#define SA_DEV_SLOT_CHAP	0x07
+#define  SA_DEVFN_CHAP		PCI_DEVFN(SA_DEV_SLOT_CHAP, 0)
+#define  SA_DEV_CHAP		PCI_DEV(0, SA_DEV_SLOT_CHAP, 0)
+
 #define SA_DEV_SLOT_GMM		0x08
 #define  SA_DEVFN_GMM		PCI_DEVFN(SA_DEV_SLOT_GMM, 0)
 #define  SA_DEV_GMM		PCI_DEV(0, SA_DEV_SLOT_GMM, 0)