Change in coreboot[master]: sb/intel/i82801gx: Automatically handle disabling functions

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded a new patch set (#2). ( https://review.coreboot.org/23662 )

Change subject: sb/intel/i82801gx: Automatically handle disabling functions
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sb/intel/i82801gx: Automatically handle disabling functions

Disable functions based on the devicetree and implement pcie port
coalescing to handle cases when the first PCIe port is disabled.

TODO:
* check if devicetrees matched removed FD writes in romstage
* check if it actually works on hardware

Change-Id: I2f6f270c631b97ececf1bd3c23f19b27828e6885
Signed-off-by: Arthur Heymans 
---
M src/mainboard/apple/macbook21/romstage.c
M src/mainboard/asrock/g41c-gs/romstage.c
M src/mainboard/asus/p5gc-mx/romstage.c
M src/mainboard/foxconn/g41s-k/romstage.c
M src/mainboard/getac/p470/romstage.c
M src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
M src/mainboard/gigabyte/ga-g41m-es2l/romstage.c
M src/mainboard/ibase/mb899/romstage.c
M src/mainboard/intel/d510mo/romstage.c
M src/mainboard/intel/d945gclf/romstage.c
M src/mainboard/kontron/986lcd-m/devicetree.cb
M src/mainboard/kontron/986lcd-m/romstage.c
M src/mainboard/lenovo/t60/romstage.c
M src/mainboard/lenovo/x60/romstage.c
M src/mainboard/lenovo/z61t/romstage.c
M src/mainboard/roda/rk886ex/romstage.c
M src/southbridge/intel/i82801gx/chip.h
M src/southbridge/intel/i82801gx/i82801gx.c
M src/southbridge/intel/i82801gx/i82801gx.h
19 files changed, 99 insertions(+), 81 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/23662/2