Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61503 )
Change subject: mb/google/brya: Remove `mb_gpio_lock_config()` override function ......................................................................
Patch Set 5:
(1 comment)
Patchset:
PS5:
Have we decided that the SoC will no longer manually lock gpios it deems sensitive, and instead leave that decision completley up to the mainboard?
I got you point about having a provision where SoC code first performs GPIO programming like NF and then allow remaining GPIO override from mainboards ?
Today we don't have provision for SoC code to perform GPIO programming/lock hence relying on mainboard to perform all GPIO programming. Additionally, isn't that is the right approach as well ? Assume a case where GPP_A5 is I2C0_SDL hence should be NF but chrome design don't have any device over I2C0 hence, can be available to pick GPP_A5 as GPIO instead. So, allowing SoC code to perform GPIO lock configuration might limit the freedom at mb side.
WDYT?
If the answer is yes, then we could remove the soc_lock_gpios() in src/soc/intel/common/block/smm/smihandler.c, soc_gpio_lock_config() call in src/soc/intel/alderlake/gpio.c, and the associated prototypes.
If the answer is no, we can still remove mb_gpio_lock_config().