Tim Wawrzynczak has submitted this change. ( https://review.coreboot.org/c/coreboot/+/55000 )
Change subject: util/spd_tools: Modify MT53E1G32D2NP-046 WT:B LPDDR4 config ......................................................................
util/spd_tools: Modify MT53E1G32D2NP-046 WT:B LPDDR4 config
CB:52586 ("util/spd_tools: Add MT53E1G32D2NP-046 WT:B LPDDR4 config") incorrectly set ranks per channel to 1. However, MT53E1G32D2NP-046 WT:B part has 2 channels per die and 2 physical dies. Each channel in each die shares DQ-DQS lines with the channel in other die and uses separate CS lines. Thus, number of ranks per channel is 2.
This change fixes the attribute ranksPerChannel for MT53E1G32D2NP-046 WT:B in LP4x global config by setting it to 2.
BUG=b:186616388
Change-Id: Iba87754ca04c2e026a9cbc8ef07412b467140cba Signed-off-by: Amanda Huang amanda_hwang@compal.corp-partner.google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/55000 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com --- M util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt b/util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt index d032064..8df4472 100644 --- a/util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt +++ b/util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt @@ -68,7 +68,7 @@ "channelsPerDie": 2, "diesPerPackage": 2, "bitWidthPerChannel": 16, - "ranksPerChannel": 1, + "ranksPerChannel": 2, "speedMbps": 4267 } },